LTC3613 datasheet(30/44 Pages) AD

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LTC7131-1

Rev. 0

For more information www.analog.com

7131-1 F17a

LTC7131-1

VMASTER

REF

DAOUT

TRACK/SS

7131-1 F17b

LTC7131-1

VMASTER

REF

DAOUT

TRACK/SS

7131-1 F17c

LTC7131-1

VMASTER

REF

DAOUT

TRACK/SS

(a) Slave IC Circuit for Ratiometric Tracking

and VMASTER ≤ VSLAVE

(b) Slave IC Circuit for Ratiometric Tracking

and VMASTER ≥ VSLAVE

Figure 17. Slave IC Circuits

APPLICATIONS INFORMATION

DDR Mode

The LTC7131-1 can both sink and source current if

the MODE/SYNC pin is set to forced continuous mode.

Current sinking is limited to –20A+ΔIL/2. An exter-

nal reference voltage connected to the REF pin can be

used to set the output voltage. The output voltage can

be margined by ±25% in the same way as a resistor

programmed reference.

INTVCC (LDO)

The LTC7131-1 features a true PMOS LDO that supplies

power to INTVCC from the SVIN supply. INTVCC powers

the gate drivers and much of the LTC7131-1’s internal

circuitry. The LDO regulates the voltage at the INTVCC

pin to 5V when SVIN is greater than 5.5V. INTVCC can

supply a peak current of 100mA and must be bypassed

to ground with a minimum of 4.7µF ceramic capacitor or

low ESR electrolytic capacitor. No matter what type of bulk

capacitor is used, an additional 0.1µF ceramic capacitor

placed directly adjacent to the INTVCC and PGND pins is

highly recommended. Good bypassing is needed to sup-

ply the high transient currents required by the MOSFET

gate drivers. High input voltage applications in which the

internal MOSFETs are being driven at high frequencies

may cause the maximum junction temperature rating for

the LTC7131-1 to be exceeded. The INTVCC current, which

is dominated by the gate charge current, also known as

the driver current, is supplied by the 5V LDO. The gate

charge current is dependent on operating frequency as

discussed on Efficiency Considerations section. The

power dissipation for the IC in this case is equal to SVIN

• (INTVCC current). For example, the LTC7131-1 INTVCC

current is about 27.5mA from a 20V supply at 500kHz in

the BGA package given by Equation 19.

PD = 20V • 27.5mA = 0.55W

(19)

For applications where the main input power is 5V, tie the

SVIN, VIN and INTVCC pins together and tie the combined

pins to the 5V input with a 1Ω or 2.2Ω resistor as shown

in Figure 18 to minimize the voltage drop caused by the

gate charge current. This will override the INTVCC linear

regulator and will prevent INTVCC from dropping too low

due to the dropout voltage. Make sure the INTVCC voltage

is at or exceeds 4.5V to prevent excessive dissipation in

the internal Power MOSFETs due to high RDS(ON).

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