LTC3613 datasheet(34/44 Pages) AD

34 / 44 page

LTC7131-1

Rev. 0

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APPLICATIONS INFORMATION

Assuming worst-case conditions of VIN = 12V, CIN should

be selected for a maximum current rating of Equation 31.

IRMS = 25A •

1.5V

12V

•

20V

1.5V

– 1

⎛

⎝

⎜

⎞

⎠

⎟ = 8.25ARMS

(31)

Finally, define the soft start-up time choosing the proper

value for the capacitor and the resistor connected to

TRACK/SS. If we set minimum tSS = 5ms, Equation 32

can be solved.

CSS =

5µA • 5ms

1.5V

= 16.7nF

(32)

The standard value of 18nF guarantees the minimum soft-

start up time of 5ms.

2-Phase Operation

Using two LTC7131-1’s as a 2-phase regulator to supply

50A loads was discussed in the Operation section. A few

more details need to be brought to the user’s attention to

ensure correct operation:

1. PMBus connection and READ_IIN/IOUT: Although the

2-phase regulator will operate fine with the PMBus

interface connected to the master only, the READ_

IOUT and READ_IIN measured values will only be

available for the phase(s) that are connected. Since

each phase’s LTC7131-1 supplies half the load in a

2-phase converter, the value read (if from the master

only) needs to be doubled to obtain the total IOUT or

IIN value. Because of slight differences in tracking

between phases due to IC and inductor tolerances, a

more accurate reading will be obtained by connect-

ing to both phases so that total IOUT and IIN can be

computed by summing each phase’s contribution.

2. Slave PGOOD/ALERT status and margining: When the

master and slave are monitoring the same output,

it is sufficient to monitor the master’s PGOOD and

ALERT pins only. The PGOOD/ALERT pins from both

master and slave can also be wire OR’ed if desired.

However, if the output voltage is margined with the

PMBus interface, the PGOOD/ALERT status of the

slave will only be valid if the slave knows what the new

margined reference is, i.e. the margin change needs

to be sent to both the master and the slave. This can

be done easily by using the MFR_RAIL_ADDRESS to

assign the same rail address to both the master and

slave so that the margin change can be done with

a single write. Be aware that PMBus reads from a

common address need to be done separately to avoid

bus contentions.

3. Using the Master’s CLKOUT: The CLKOUT pin provides

an 180° out-of-phase clock that can be connected to

the slaves MODE/SYNC pin as a simple way to run

the phases out-of-phase with each other. However, be

aware that the master’s CLKOUT pin only provides

this out-of-phase clock when the master is using its

internal oscillator programmed from the RT pin. If the

master is externally clocked, the slave’s anti-phase

clock will need to be obtained from another source.

High Duty Cycle Applications

The internal power MOSFETs of the LTC7131-1 have a

top-to-bottom RDS(ON) ratio of 3.5 to optimize power dis-

sipation for low duty-cycle applications. For some appli-

cations, such as using a 5V supply (Figure 19) or using

a separate low voltage supply connected to VIN pin (see

Using Separate SVIN/VIN Supplies section), the duty cycle

may be high enough that the top MOSFET power dissipa-

tion becomes significant at higher loads. It is important in

these types of applications to estimate power loss and die

temperature rise to make sure the maximum die tempera-

ture is not exceeded. Once a prototype is built, this can be

easily verified using the READ_TEMPERATURE command.

Another consideration for high duty cycles is the upper

limit of how high the duty cycle can go. The bottom

MOSFET has a minimum on-time of 150ns (worst case) to

sense inductor current and refresh the BOOST capacitor.

These means that the maximum achievable duty cycle is

given by Equation 33.

Max % Duty Cycle = (1 – fSW • 150 • 10-9) • 100% (33)

The maximum duty cycle will limit the maximum allowable

output voltage at the minimum supply voltage.

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