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SC18IM704 Datasheet(PDF) 6 Page - NXP Semiconductors |
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SC18IM704 Datasheet(HTML) 6 Page - NXP Semiconductors |
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6 / 28 page ![]() NXP Semiconductors SC18IM704 UART to I2C-bus bridge any GPIO pins programmed as output without having to write to SC18IM704 internal IOState register. 002aac052 O CHAR. DATA P CHAR. Figure 7. Write to output port 7.1.6 Read from GPIO port The host issues the input port read command by sending an I character. This command enables the host to quickly read any GPIO pins programmed as input without having to read SC18IM704 internal IOState register. Once the command is issued, SC18IM704 will read its internal IOState register and returns its content to the host. 002aac053 I CHAR. 18IM responds DATA P CHAR. Figure 8. Read from output port 7.1.7 Repeated START: read after write SC18IM704 also supports ‘read after write’ command as specified in the NXP Semiconductors I2C-bus specification. This allows a read command to be sent after a write command without having to issue a STOP condition between the two commands. The host issues a write command as normal, then immediately issues a read command without sending a STOP (P) character after the write command. 002aac054 NUMBER OF BYTES S CHAR. TARGET ADR. + W S CHAR. NUMBER OF BYTES TARGET ADR. + R DATA 0 DATA N P CHAR. 18IM responds DATA 0 DATA N Figure 9. Repeated START: read after write 7.1.8 Repeated START: write after write SC18IM704 also supports ‘write after write’ command as specified in the NXP Semiconductors I2C-bus specification. This allows a write command to be sent after a write command without having to issue a STOP condition between the two commands. The host issues a write command as normal, then immediately issues a second write command without sending a STOP (P) character after the first write command. SC18IM704 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 1.0 — 22 September 2021 6 / 28 |
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