NXP Semiconductors

SC18IM704

9 Internal registers available

9.1 Register summary

Register

address

Register

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

R/W

Default

value

General register set

0x00

BRG0

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

R/W

0xF0

0x01

BRG1

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

R/W

0x02

0x02

PortConf1

GPIO3.1

GPIO3.0

GPIO2.1

GPIO2.0

GPIO1.1

GPIO1.0

GPIO0.1

GPIO0.0

R/W

0x55

0x03

PortConf2

GPIO7.1

GPIO7.0

GPIO6.1

GPIO6.0

GPIO5.1

GPIO5.0

GPIO4.1

GPIO4.0

R/W

0x55

0x04

IOState

GPIO7

GPIO6

GPIO5

GPIO4

GPIO3

GPIO2

GPIO1

GPIO0

R/W

- [1]

0x05

reserved

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

-

0x00

0x06

I2CAdr

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

R/W

0x26

0x07

I2CClkL

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

R/W

0x13

0x08

I2CClkH

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

R/W

0x00

0x09

I2CTO

TO7

TO6

TO5

TO4

TO3

TO2

TO1

TE

R/W

0x66

0x0A

I2CStat

1

1

1

1

I2CStat[3]

I2CStat[2]

I2CStat[1]

I2CStat[0]

R

0xF0

Table 5. Internal registers summary

[1]

Since the GPIO pins are configured as inputs after reset, the default value of this register depends on the states of the GPIO pins.

9.2 Register descriptions

9.2.1 Baud Rate Generator (BRG)

The baud rate generator is an 8-bit counter that generates the data rate for the

transmitter and the receiver. The rate is programmed through the BRG register and the

baud rate can be calculated as follows:

Remark: To calculate the baud rate the values in the BRG registers must first be

converted from hex to decimal.

Remark: For the new baud rate to take effect, both BRG0 and BRG1 must be written

in sequence (BRG0, BRG1) with new values. The new baud rate will be in effect once

BRG1 is written.

9.2.2 Programmable port configuration (PortConf1 and PortConf2)

GPIO port 0 to port 7 may be configured by software to one of three types. These

are: push-pull, open-drain, and input-only. Two bits are used to select the desired

configuration for each port pin. PortConf1 is used to select the configuration for GPIO3 to

GPIO0, and PortConf2 is used to select the configuration for GPIO7 to GPIO4. A port pin

has Schmitt triggered input that also has a glitch suppression circuit.

SC18IM704

All information provided in this document is subject to legal disclaimers.

© NXP B.V. 2021. All rights reserved.

Product data sheet

Rev. 1.0 — 22 September 2021

9 / 28