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SC18IM704 Datasheet(PDF) 14 Page - NXP Semiconductors

Part # SC18IM704
Description  UART to I2C-bus bridge
PDF  28 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

SC18IM704 Datasheet(HTML) 14 Page - NXP Semiconductors

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NXP Semiconductors
SC18IM704
UART to I2C-bus bridge
VDD = 1.71 V to 3.6 V; Tamb = -40 °C to +105 °C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ[1]
Max
Unit
Vth(LH)
positive-going threshold
voltage
except SCL, SDA
-
0.6VDD
0.7VDD V
VIH
HIGH-level input voltage SCL, SDA only
[2] 0.7VDD
-
5.4
V
IOL = 4 mA; 2.5 V ≤ VDD ≤ 3.6 V
-
0.5
V
VOL
LOW-level output
voltage
IOL = 3 mA; 1.71 V ≤ VDD ≤ 2.5 V
-
0.5
V
IOH = 4 mA; 2.5 V ≤ VDD ≤ 3.6 V
VDD - 0.4 -
-
V
VOH
HIGH-level output
voltage
IOH = 3 mA; 1.71 V ≤ VDD ≤ 2.5 V
VDD - 0.5
-
V
Cio
input/output capacitance
[3] -
-
15
pF
IIL
LOW-level input current logic 0; all ports; VI = 0.4 V
-
-
-80
μA
ILI
input leakage current
all ports; VI = VIL or VIH
[4] -
-
-10
μA
IT(HL)
negative-going transition
current
logic 1-to-0; all ports; VI = 2.0 V at
VDD = 3.6 V
-30
-
-450
μA
VI = 0 V;
[5]
µA
2.0 V ≤ VDD ≤ 3.6 V
10
50
90
µA
1.71 V ≤ VDD ≤ 2.0 V
7
50
85
µA
Ipu
pull-up current
VDD < VI < 5 V
0
0
0
µA
Table 12. Static characteristics...continued
[1]
Typical ratings are not guaranteed. The values listed are at room temperature, 3 V.
[2]
VDD ≥ to 1.71V; otherwise limited to 3.6 V max when VDD = 0 V
[3]
Pin capacitance is characterized but not tested.
[4]
Measured with pins in high-impedance mode.
[5]
Pull-up current measured across the weak pull-up resistor
12 Dynamic characteristics
All the timing limits are valid within the operating supply voltage and ambient temperature range; VDD = 1.71 V to 3.6 V; Tamb
= -40 °C to +105 °C; and refer to VIL and VIH with an input voltage of VSS to VDD.
Standard
mode I2C-bus
Fast mode
I2C-bus
Symbol
Parameter
Conditions
Min
Max
Min
Max
Unit
fSCL
SCL clock frequency
0
100
0
400
kHz
tBUF
bus free time between a STOP and START
condition
4.7
-
1.3
-
μs
tHD;STA
hold time (repeated) START condition
4.0
-
0.6
-
μs
tSU;STA
set-up time for a repeated START condition
4.7
-
0.6
-
μs
tSU;STO
set-up time for STOP condition
4.0
-
0.6
-
μs
tHD;DAT
data hold time
0
-
0
-
ns
tVD;ACK
data valid acknowledge time
-
0.6
-
0.6
μs
LOW-level
-
0.6
-
0.6
μs
tVD;DAT
data valid time
HIGH-level
-
0.6
-
0.6
μs
Table 13. I2C-bus timing characteristics
SC18IM704
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 1.0 — 22 September 2021
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