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SC18IM704 Datasheet(PDF) 7 Page - NXP Semiconductors

Part # SC18IM704
Description  UART to I2C-bus bridge
PDF  28 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

SC18IM704 Datasheet(HTML) 7 Page - NXP Semiconductors

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NXP Semiconductors
SC18IM704
UART to I2C-bus bridge
002aac055
NUMBER
OF BYTES
S CHAR. TARGET ADR.
+ W
S CHAR.
NUMBER
OF BYTES
TARGET ADR.
+ W
DATA 0
DATA 0
DATA N
P CHAR.
DATA N
Figure 10. Repeated START: write after write
7.1.9 Power-down mode
SC18IM704 can be placed in a low-power mode. In this mode the internal oscillator is
stopped and SC18IM704 will no longer respond to the host messages. Enter the Power-
down mode by sending the power-down character Z (0x5A) followed by the two defined
bytes, which are 0x5A and followed by 0xA5. If the exact message is not received, the
device will not enter the power-down state.
Upon entering the power-down state, UART Rx pin is used to exit Deep Power-down
mode. The bridge remains in the Deep Power-down mode as long as the Rx pin remains
HIGH. Any character sent brings the bridge out of Deep Power-down mode but ignores
the character.
002aac056
Z CHAR.
0x5A
0xA5
P CHAR.
Figure 11. Power-down mode
7.1.10 Read version function ID
A read version command was included with SC18IM704 as a diagnostic tool when
bringing up the bridge to verify communication. To retrieve the version, the host must
send a ASCII ‘V’ followed by an ASCII ‘P’ character. The ‘704 will respond with a null
terminated version string. An example response:
• 0x53 0x43 0x31 0x38 0x49 0x4D 0x37 0x30 0x34 0x20 0x31 0x2E0 0x30 0x2E 0x31
0x00
Which corresponds with the ascii string “SC18IM704 1.0.1”.
The response will always be 16 characters with the last character being a 0x00 null
terminator.
8 I2C-bus serial interface
The I2C-bus uses two wires (SDA and SCL) to transfer information between devices
connected to the bus, and it has the following features:
• Bidirectional data transfer between controllers and targets
• Multi-controller bus (no central controller)
• Arbitration between simultaneously transmitting controllers without corruption of serial
data on the bus
• Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus
• Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
SC18IM704
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 1.0 — 22 September 2021
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