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ZSSC3123AI2R Datasheet(PDF) 7 Page - Renesas Technology Corp |
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ZSSC3123AI2R Datasheet(HTML) 7 Page - Renesas Technology Corp |
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7 / 62 page ![]() ZSSC3123 Datasheet Nov 19, 2021 Page 7 © 2021 Renesas Electronics 1. Pin Assignments 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCORE CC Alarm_Low/PDM_T VSS C1 VSS C0 VDD Alarm_High Ready/PDM_C VSS SCL/SCLK SS SDA/MISO Figure 1. Pin Assignments for 4.4mm 5.0mm 14-TSSOP – Top View 2. Pin Descriptions Table 1. Pin Descriptions Pin Name Description Notes 1 VCORE Core voltage Always connect the VCORE pin to an external capacitor to ground that is within the specifications given in section 4 for CVCORE_SM and CVCORE_UM. This is the only internal module pin. For ESD details, see section 15. 2 C0 Capacitor input 0 3 VSS Ground supply Connecting to GND for shielding is strongly recommended. 4 CC Common capacitor input 5 VSS Ground supply Connecting to GND for shielding is strongly recommended. 6 C1 Capacitor input 1 If not used, must be unconnected. 7 VDD Supply voltage (1.8V to 5.5V) 2.3V to 5.5V for ZSSC3123 VDD must be connected to VSUPPLY. See section 4. 8 Alarm_Low/PDM_T Low alarm output Temperature PDM (see Table 20) If not used, must be unconnected. 9 Alarm_High High alarm output If not used, must be unconnected. 10 Ready/PDM_C Ready signal (conversion complete output) Capacitance PDM (see Table 20) If not used, must be unconnected. |
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