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ZSSC3123AI2R Datasheet(PDF) 1 Page - Renesas Technology Corp |
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ZSSC3123AI2R Datasheet(HTML) 1 Page - Renesas Technology Corp |
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1 / 62 page ![]() Datasheet ZSSC3123 cLiteTM Capacitive Sensor Signal Conditioner Nov 19, 2021 Page 1 © 2021 Renesas Electronics Description The ZSSC3123 is a CMOS integrated circuit for accurate capaci- tance-to-digital conversion and sensor-specific correction of capacitive sensor signals. Digital compensation of sensor offset, sensitivity, and temperature drift is accomplished via an internal digital signal processor running a correction algorithm with cali- bration coefficients stored in a non-volatile EEPROM. The ZSSC3123 is configurable for capacitive sensors with capaci- tances up to 260pF and a sensitivity of 125aF/LSB to 1pF/LSB depending on resolution, speed, and range settings. It is com- patible with both single capacitive sensors (both terminals must be accessible) and differential capacitive sensors. Measured and corrected sensor values can be output as I2C, SPI, pulse density modulation (PDM), or alarms. The I2C interface can be used for a simple PC-controlled cali- bration procedure to program a set of calibration coefficients into an on-chip EEPROM. The calibrated ZSSC3123 and a specific sensor are mated digitally: fast, precise, and without the cost overhead of trimming by external devices or laser. Available Support ZSSC3123 SSC Evaluation Kit available: SSC Evaluation Board, samples, software, documentation. Support for industrial mass calibration available. Quick circuit customization option for large production volumes. Application: Digital Output, Alarms VSUPPLY (2.3V to 5.5V) GND 0.1µF VDD Vcore Ready VSS SDA/MIS O SCL/SCLK C0 SS Alarm_High CC Alarm_Low cLite ZSSC3123 0.1µF Features Maximum target input capacitance: 260pF Sampling rates as fast as 0.7ms at 8-bit resolution; 1.6ms at 10-bit; 5.0ms at 12-bit; 18.5ms at 14-bit Digital compensation of sensor: piece-wise 1st and 2nd order sensor compensation or up to 3rd order single-region sensor compensation Digital compensation of 1st and 2nd order temperature gain and offset drift Internal temperature compensation reference (no external components) Programmable capacitance span and offset Layout customized for die-die bonding with sensor for low- cost, high-density chip-on-board assembly Accuracy as high as ±0.25% FSO at -40°C to 125°C, 3V, 5V, Vsupply ±10% (see data sheet section 5 for restrictions) Minimized calibration costs: no laser trimming, one-pass calibration using a digital interface Wide capacitance range to support a broad portfolio of different sensor elements Excellent for low-power battery applications I2C or SPI interface—easy connection to a microcontroller PDM outputs (Filtered Analog Ratiometric) for both capacitance and temperature Up to two alarms that can act as full push-pull or open-drain switches Supply voltage: 2.3V to 5.5V Typical current consumption 750μA down to 60μA depending on configuration Typical Sleep Mode current: ≤ 1μA at 85°C Operation temperature: –40°C to +125°C depending on part code Die or 4.4 5.0 mm 14-TSSOP package |
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