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DA14531 Datasheet(PDF) 82 Page - Dialog Semiconductor |
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DA14531 Datasheet(HTML) 82 Page - Dialog Semiconductor |
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82 / 374 page ![]() DA14531 Ultra Low Power Bluetooth 5.1 SoC Final Datasheet Revision 3.1 09-Jul-2020 CFR0011-120-00 82 of 374 © 2020 Dialog Semiconductor Figure 26 depicts the possible clock sources as well as all different divisions and multiplexing paths towards the generation of each block's clock. Furthermore, the required registers that have to be programmed are also shown in Figure 26. Internal clock sources of DA14531 are the RC32M, RC32K/512K, and RCX oscillators. External clock sources of DA14531 are the 32 MHz crystal oscillator (the pins XTAL32Mp and XTAL32Mm), the 32.768 kHz crystal oscillator (the pins XTAL32kp and XTAL32km mapped on P0_3 and P0_4, respectively), or an external digital clock (the pin P0_3). There are two main clock lines which are of interest: ● lp_clk: this is the low power clock used for the sleep modes and can only be either the RCX, the RC32K, the XTAL32K, or an externally supplied digital clock ● sys_clk: this is the system clock used for the AMBA clock (hclk), which runs the CPU, the memories, and the bus. This clock source can be one of the oscillators or an externally supplied digital clock The clock names depicted in Figure 26 are explained in Table 43. Table 43: Generated Clocks Description Clock Name Description wakeupct_clk Clocked wake-up controller clock. apb_clk AMBA APB interface clock. otp_clk OTP controller clock. hclk AMBA AHB interface clock. ble_hclk AMBA AHB clock for the BLE core. wdog_clk Watchdog clock. pmu_rc_clk Clock for the PMU and analog start-up FSM. icp_clk_512_c (512KHz) Clock for the Charge pump in the LDO_CORE. gen_por_timer Clock for the POR_FORCE Timer. spi_clk Clock for the SPI controller. This clock is further divided by 2, 4, 8, or 14 as defined by SPI_CTRL_REG[SPI_CLK]. spi_fast_clk Fast 32 MHz clock for the SPI controller. i2c_clk Clock for the I2C controller. This clock is further divided to provide 100 kHz or 400 kHz as defined by I2C_CON_REG[I2C_SPEED]. uart_clk Clock for the UART. uart2_clk Clock for the UART2. quad_clk Clock for the quadrature decoders. rfcu_clk Clock for the RF control unit of the Radio. tmr0_clk, tmr2_clk Timer0/2 clocks. tmr1_clk Timer1 clock. tmr0_on_clk Timer0 ON counter clock. rtc_clk Clock for Real Time Clock (RTC). gp_adc_clk General Purpose ADC conversion clock. ble_crypt_clk Clock for the Crypto block of the BLE core. ble_master1_clk Internal clock for the BLE core. ble_master2_clk Internal clock for the BLE core. |
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