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CS43131 Datasheet(PDF) 108 Page - Cirrus Logic

Part # CS43131
Description  130-dB, 32-Bit High-Performance DAC with Integrated Headphone Driver and Impedance Detection
PDF  156 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS43131 Datasheet(HTML) 108 Page - Cirrus Logic

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108
DS1155F1
CS43131
6.4 DSD Registers
6.4 DSD Registers
0x04 0026 XSP LRCK Period 1
XSP_LCPR_LSB
p. 122
0
011111
1
0x04 0027 XSP LRCK Period 2
XSP_LCPR_MSB
p. 122
0
000000
0
0x04 0028 XSP Clock
Configuration
—
XSP_M/SB
XSP_SCPOL_
OUT
XSP_SCPOL_
IN
XSP_LCPOL_
OUT
XSP_LCPOL_
IN
p. 122
0
000110
0
0x04 0029 XSP Frame
Configuration
—
XSP_STP
XSP_5050
XSP_FSD
p. 122
0
000101
0
0x04 002A–
0x04 FFFF
Reserved
—
0
000000
0
0x05 0000 ASP Channel 1
Location
ASP_RX_CH1
p. 123
0
000000
0
0x05 0001 ASP Channel 2
Location
ASP_RX_CH2
p. 123
0
000000
0
0x05 0002–
0x05 0009
Reserved
—
0
000000
0
0x05 000A ASP Channel 1 Size
and Enable
—
ASP_RX_
CH1_AP
ASP_RX_
CH1_EN
ASP_RX_CH1_RES
p. 123
0
000011
0
0x05 000B ASP Channel 2 Size
and Enable
—
ASP_RX_
CH2_AP
ASP_RX_
CH2_EN
ASP_RX_CH2_RES
p. 123
0
000111
0
0x05 000C–
0x05 FFFF
Reserved
—
0
000000
0
Address
Function
7
654321
0
0x06 0000 XSP Channel 1
Location
XSP_RX_CH1
p. 124
0
000000
0
0x06 0001 XSP Channel 2
Location
XSP_RX_CH2
p. 124
0
000000
0
0x06 0002–
0x06 0009
Reserved
—
0
000000
0
0x06 000A XSP Channel 1 Size
and Enable
—
XSP_RX_
CH1_AP
XSP_RX_
CH1_EN
XSP_RX_CH1_RES
p. 124
0
000011
0
0x06 000B XSP Channel 2 Size
and Enable
—
XSP_RX_
CH2_AP
XSP_RX_
CH2_EN
XSP_RX_CH2_RES
p. 124
0
000111
0
0x06 000C–
0x06 FFFF
Reserved
—
0
000000
0
0x07 0000 DSD Volume B
DSD_VOLUME_B
p. 124
0
111100
0
0x07 0001 DSD Volume A
DSD_VOLUME_A
p. 125
0
111100
0
0x07 0002 DSD Processor Path
Signal Control 1
DSD_RAMP_
UP
DSD_VOL_
BEQA
DSD_SZC
—
DSD_AMUTE DSD_AMUTE_
BEQA
DSD_MUTE_A DSD_MUTE_B
p. 125
1
010100
0
0x07 0003 DSD Interface
Configuration
—
—
—
DSD_M_SB
DSD_PM_EN DSD_PM_SEL
p. 125
0
000000
0
0x07 0004 DSD Processor Path
Signal Control 2
—
DSD_PRC_SRC
DSD_EN
DSD_SPEED
STA_DSD_
DET
INV_DSD_
DET
p. 126
0
000001
0
0x07 0005 DSD and PCM Mixing
Control
—MIX_PCM_
PREP
MIX_PCM_
DSD
p. 126
0
000000
0
0x07 0006 DSD Processor Path
Signal Control 3
DSD_ZERODB DSD_HPF_EN
—
SIGCTL_
DSDEQPCM
DSD_INV_A
DSD_INV_B
DSD_SWAP_
CHAN
DSD_COPY_
CHAN
p. 126
0
100000
0
0x07 0007–
0x07 FFFF
Reserved
—
0
000000
0
Address
Function
7
654321
0



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