Low Power, 24-Bit Sigma-Delta ADC with In-

Amp and Embedded Reference (6 Channel)

Preliminary Technical Data

AD7794

REV.PrE

6/04.

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FEATURES

Six Differential Analog Inputs

Low Noise Programmable Gain Instrumentation-Amp

RMS noise: 80 nV (Gain = 64)

Bandgap Reference with 5 ppm/ C Drift typ

Power

Supply: 2.7 V to 5.25 V operation

Normal: 400 µA typ

Power-down: 1 µA max

Update Rate: 4 Hz to 500 Hz

Simultaneous 50 Hz/60 Hz Rejection

Internal Clock Oscillator

Reference Detect

Programmable Current Sources (10 µA/200 µA/1 mA)

On-Chip Bias Voltage Generator

100 nA Burnout Currents

Low Side Power Switch

Independent Interface Power Supply

24-Lead TSSOP Package

INTERFACE

3-wire serial

SPI®, QSPI™, MICROWIRE™, and DSP compatible

Schmitt trigger on SCLK

APPLICATIONS

Temperature measurement

Pressure measurement

Weigh scales

GENERAL DESCRIPTION

The AD7794 is a low power, complete analog front end for

low frequency measurement applications. It contains a low

noise 24-bit ∑-∆ ADC with six differential inputs. The on-chip

low noise instrumentation amplifier means that signals of small

amplitude can be interfaced directly to the ADC.

The device contains a precision low noise, low drift internal

reference for absolute measurements. An external reference can

also be used if ratiometric measurements are required. Other

on-chip features include programmable excitation current

sources and a bias voltage generator for temperature applica-

tions along with 100 nA burnout currents. For pressure and

weighscale applications, a low-side power switch is available to

power down the bridge between conversions to minimize the

power consumption of the system. The device can be operated

with the internal clock or, alternatively, an external clock can be

used if synchronizing several devices. The output data rate

from the part is software programmable and can be varied from

4 Hz to 500 Hz.

The part operates with a power supply from 2.7 V to 5.25 V. It

consumes a current of 450 uA maximum and is housed in a 24-

lead TSSOP package.

FUNCTIONAL BLOCK DIAGRAM

AD7794

SERIAL

INTERFACE

AND

CONTROL

LOGIC

INTERNAL

CLOCK

CLK

SIGMA DELTA

ADC

AIN1(+)

AIN1(-)

AIN5(+)/IOUT2

AIN5(-)/IOUT1

MUX

IN-AMP

REFIN1(+)

REFIN1(-)

BANDGAP

REFERENCE

GND

VDD

GND

VDD

PSW

REFERENCE

DETECT

AIN2(+)

AIN2(-)

AIN6(+)/P1

AIN6(-)/P2

AIN3(+)

AIN3(-)

AIN4(+)/REFIN2(+)

AIN4(-)/REFIN2(-)

VBIAS

GND

GND

AVDD

DOUT/RDY

DIN

SCLK

CS

DVDD

TEMP

SENSOR