AD7794

Preliminary Technical Data

REV.PrE 6/04 | Page 12

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

916

AIN2(+)

AIN5(-)/IOUT1

10

11

12

15

14

13

AIN2(-)

AIN3(+)

AIN3(-)

AIN5(+)/IOUT2

REFIN1(-)

REFIN1(+)

520

AIN6(+)/P1

GND

6

7

8

19

18

17

AIN6(-)/P2

AIN1(+)

AIN1(-)

PSW

AIN4(-)/REFIN2(-)

AIN4(+)/REFIN2(+)

3

4

22

21

CS

NC

DVDD

AVDD

1

2

24

23

SCLK

CLK

DIN

DOUT/RDY

AD7794

TOP VIEW

(Not To Scale)

Figure 4. Pin Configuration

Table 4. Pin Function Descriptions

Pin

No.

Mnemonic

Function

1

SCLK

Serial Clock Input for Data Transfers to and from the ADC. The SCLK has a Schmitt-triggered input, making the

interface suitable for opto-isolated applications. The serial clock can be continuous with all data transmitted in

a continuous train of pulses. Alternatively, it can be a noncontinuous clock with the information being trans-

mitted to or from the ADC in smaller batches of data.

2

CLK

Clock In/Clock Out. The internal clock can be made available at this pin. Alternatively, the internal clock can

be disabled and the ADC can be driven by an external clock. This allows several ADCs to be driven from a

common clock, allowing simultaneous conversions to be performed.

3

CS

Chip Select Input. This is an active low logic input used to select the ADC. CS can be used to select the ADC in

systems with more than one device on the serial bus or as a frame synchronization signal in communicating

with the device. CS can be hardwired low, allowing the ADC to operate in 3-wire mode with SCLK, DIN, and

DOUT used to interface with the device.

4

NC

No Connect

5

AIN6(+)/P1

Analog Input/Digital Output pin. AIN6(+) is the positive terminal of the differential analog input pair

and GND

6

AIN6(–)/P2

Analog Input/ Digital Output pin. AIN6(–) is the negative terminal of the differential analog input pair

and GND

7

AIN1(+)

Analog Input. AIN1(+) is the positive terminal of the differential analog input pair AIN1(+)/AIN1(-).

8

AIN1(-)

Analog Input. AIN1(–) is the negative terminal of the differential analog input pair AIN1(+)/AIN1(-).

9

AIN2(+)

Analog Input. AIN2(+) is the positive terminal of the differential analog input pair AIN2(+)/AIN2(-).

10

AIN2(-)

Analog Input. AIN2(–) is the negative terminal of the differential analog input pair AIN2(+)/AIN2(-).

11

AIN3(+)

Analog Input. AIN3(+) is the positive terminal of the differential analog input pair AIN3(+)/AIN3(-).

12

AIN3(-)

Analog Input. AIN3(–) is the negative terminal of the differential analog input pair AIN3(+)/AIN3(-).

13

REFIN1(+)

Positive Reference Input. An external reference can be applied between REFIN1(+) and REFIN1(-). REFIN1(+)

14

REFIN1(-)

15

AIN5(+)/IOUT2

Analog Input/Output of Internal Excitation Current Source.

AIN5(+) is the positive terminal of the differential analog input pair AIN5(+)/AIN5(-).

Alternatively, the internal excitation current source can be made available at this pin. The excitation current

source is programmable so that the current can be 10 uA, 200 uA or 1 mA. Either IEXC1 or IEXC2 can be

switched to this output

16

AIN5(-)/IOUT1

Analog Input/Output of Internal Excitation Current Source.