| Electronic Components Datasheet Search |
|
7403 Datasheet(PDF) 14 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
7403 Datasheet(HTML) 14 Page - NXP Semiconductors |
|
14 / 28 page ![]() September 1993 14 Philips Semiconductors Product specification 4-Bit x 64-word FIFO register; 3-state 74HC/HCT7403 Master reset applied with FIFO full Notes to Fig.8 1. DIR LOW, output ready HIGH; assume FIFO is full 2. MR pulse LOW; clears FIFO 3. DIR goes HIGH; flag indicates input prepared for valid data 4. DOR goes LOW; flag indicates FIFO empty 5. Qn outputs go LOW (only last bit will be reset). Fig.8 Waveforms showing the MR input to DIR, DOR and Qn output propagation delays and the MR pulse width. handbook, halfpage t PHL VM (1) t W t PLH DIR OUTPUT VM (1) MR INPUT VM (1) MGA668 Qn OUTPUT t PHL 4 5 1 3 2 DOR OUTPUT (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |