September 1993

17

Philips Semiconductors

Product specification

4-Bit x 64-word FIFO register; 3-state

74HC/HCT7403

Shift-in operation; high-speed burst mode

Note to Fig.11

In the high-speed mode, the burst-in rate is determined by the minimum shift-in HIGH and shift-in LOW specifications.

The DIR status flag is a don't care condition, and a shift-in pulse can be applied regardless of the flag. A SI pulse which

would overflow the storage capacity of the FIFO is ignored.

Fig.11 Waveforms showing SI minimum pulse width and maximum pulse frequency, in high-speed shift-in burst

mode.

handbook, full pagewidth

MGA662

VM

(1)

SI INPUT

Dn INPUT

1/f max

tW

DIR OUTPUT