8.3 Feature Description

8.3.1 Input Voltage Range (VIN1, VIN2)

With a steady-state input voltage range from 3 V to 36 V, the TLVM13610 module is intended for step-down

conversions from typical 12-V, 24-V, and 28-V input supply rails. The schematic circuit in Figure 8-1 shows all the

necessary components to implement a TLVM13610-based buck regulator using a single input supply.

PG

EN

RT

PGND

AGND

VOUT1

FB

VLDOIN

VIN1

PGND

VIN2

CIN2

COUT

RFBB

TLVM13610

RRT

VIN = 3V to 36 V

RENT

RENB

Optional

external bias

RPG

VCC

PGOOD

indicator

VOUT = 1-10 V

CIN1

VOUT2

CBOOT

RBOOT

10 F

10 F

100 k

RFBT

CFF

Precision enable

for VIN UVLO

Adjustable

Switching

Frequency

Figure 8-1. TLVM13610 Schematic Diagram with Input Voltage Operating Range of 3 V to 36 V

The minimum input voltage required for start-up is 3.7 V. Take extra care to make sure that the voltage at the

VIN pins of the module (VIN1 and VIN2) does not exceed the absolute maximum voltage rating of 42 V during

line or load transient events. Voltage ringing at the VIN pins that exceeds the Section 7.1 can damage the IC.

8.3.2 Adjustable Output Voltage (FB)

The TLVM13610 has an adjustable output voltage range from 1 V up to a maximum of 20 V or slightly less than

VIN, whichever is lower. Setting the output voltage requires two feedback resistors, designated as RFBT and RFBB

in Figure 8-1. The reference voltage at the FB pin is set at 1 V with a feedback system accuracy over the full

junction temperature range of ±1%. The junction temperature range for the device is –40°C to 125°C.

Calculate the value for RFBB using Equation 1 below based on a recommended value for RFBT of 100 kΩ.

RFBBkΩ = RFBTkΩ

VOUT1−1 

(1)

Table 8-1 lists the standard resistor values for several output voltages and the recommended switching

frequency range to maintain reasonable peak-to-peak inductor ripple current. This table also includes the

minimum required output capacitance for each output voltage setting to maintain stability. The capacitances

as listed represent effective values for ceramic capacitors derated for DC bias voltage and temperature.

Furthermore, place a feedforward capacitor, CFF, in parallel with RFBT to increase the phase margin when the

output capacitance is close to the minimum recommended value.

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TLVM13610

SLVSH63 – FEBRUARY 2023

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