SW52212 datasheet(32/71 Pages) SILABS

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8.8 Data Protocol

The clock driver I2C protocol accepts byte write, byte read, block write, and block read operations from the controller. For block write/

read operations, the system controller can access the bytes in sequential order from lowest to highest (most significant bit first) with the

ability to stop after any complete byte is transferred. For byte write and byte read operations, the system controller can access individu-

ally indexed bytes. The block write and block read protocol is outlined in Table 8.2 Block Read and Block Write Protocol on page 32

while Table 8.3 Byte Read and Byte Write Protocol on page 33 outlines byte write and byte read protocol. SA is the address select for

I2C. When the part is powered up, SA will be latched to select the I2C address.

Table 8.1. SA State on First Application of PWRGD/PWRDNb

Description

Address

State of SA on first application of PWRGD/PWRDNb1

1101001

1101010

Note:

1. Si52202 default address is 0x6A.

Table 8.2. Block Read and Block Write Protocol

Block Write Protocol

Block Read Protocol

Bit

Description

Bit

Description

Start

8:2

Slave address—7 bits

8:2

Slave address–7 bits

Write

Acknowledge from slave

18:11

Command Code—8 bits

18:11

Command Code–8 bits

Acknowledge from slave

27:20

Byte Count—8 bits

Repeat start

Acknowledge from slave

27:21

Slave address–7 bits

36:29

Data byte 1–8 bits

Read = 1

Acknowledge from slave

45:38

Data byte 2–8 bits

37:30

Byte Count from slave–8 bits

Acknowledge from slave

Acknowledge

....

Data Byte/Slave Acknowledges

46:39

Data byte 1 from slave–8 bits

....

Data Byte N–8 bits

Acknowledge

....

Acknowledge from slave

55:48

Data byte 2 from slave–8 bits

....

Stop

Acknowledge

....

Data bytes from slave/Acknowl-

edge

....

Data Byte N from slave–8 bits

....

NOT Acknowledge

....

Stop

Data Sheet

Control Registers

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