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SAF784X Datasheet(PDF) 39 Page - NXP Semiconductors |
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SAF784X Datasheet(HTML) 39 Page - NXP Semiconductors |
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39 / 93 page ![]() SAF784X_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 9 May 2008 39 of 93 NXP Semiconductors SAF784x One chip CD audio device with integrated MP3/WMA decoder The serial format consists of a pause bit followed by a start bit, followed by data bits. The format of the data is explained in Table 10. Bit length: seven sysclk periods. Frame length: 11 bits. [1] The CFLG repetition rate is not fixed and depends on disc speed and output interface speed. There is always at least one pause bit. [2] Cormode definition: ‘000’: C1 correction, ‘011’: C2 correction, ‘100’: corrector not active, Others: not used. [3] FlagFail and CorFail indicate failure status on previous code word. [4] ErrorCount indicates the number of errors found by the error corrector. 6.5.8.2 BLER counters There are two BLER counters which count the number of frames C1 and C2, with at least one error. C2 erasures coming from C1 are also counted; it is irrelevant if the frame was correctable or not. These registers are reset on read, and the user is responsible for reading them at regular intervals. The BLER counters can be read by registers C1Bler and C2Bler. 6.5.9 Audio back end and data output interfaces The channel decoder back end is shown in Figure 20. Table 10. Format description of CFLG serial bus Bit Value Meaning Note 0 1 start bit [1] 1 to 3 Cormode[2:0] type of correction [2] 4 FlagFail failure flag set because correction too unsafe [3] 5 CorFail failure flag set because correction impossible [3] 9, 6 to 8 ErrorCount[3:0] number of errors corrected [4] 10 0 pause bit [1] Fig 20. Backend audio functions 001aag324 to I2S handler I2S left kill right kill INTERPOLATE /HOLD DE-EMPHASIS SOFT MUTE ERROR DETECT SILENCE DETECT KILL GENERATION UPSAMPLE HARD MUTE MEMORY PROCESSOR EBU INTERFACE I2S |
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