SAF784X datasheet(4/93 Pages) NXP

4 / 93 page

SAF784X_2

Product data sheet

Rev. 02 — 9 May 2008

4 of 93

NXP Semiconductors

SAF784x

One chip CD audio device with integrated MP3/WMA decoder

Block diagram

Fig 1.

SAF784x top level block diagram

001aag353

CHANNEL DECODER

DIGITAL

DECODER

PARALLEL

DATA

INTERFACE

CHANNEL

CLOCK

CONTROL

MOTOR

CONTROL

EBU

INTERFACE

I2S-BUS

OUTPUT

BLOCK DECODER

AUDIO PROCESSOR

PARALLEL INPUT AND

OUTPUT INTERFACES

BLOCK

BUFFER

MEMORY

C3 ERCO

AHB

INTERFACE

AHB

INTERFACE

PROGRAMMABLE

ROM (130 kB)

BOOT ROM (42 kB)

FLASH (64 kB)

SMIU

AHB INTERFACE

AHB REGISTERS

RAM (110 kB)

CLOCK CONTROL

MULTI-LAYER AHB SUB-SYSTEM

INTERRUPT

CONTROLLER

AHB

INTERFACE

SEGMENTATION

MANAGER

DMA

CONTROLLER

ARM7 CPU

TIMER (

× 2)

UART (

× 2)

I2C-BUS

EBU

BUFFER

VPB SUB-SYSTEM

SRC

GPIO

WATCHDOG

TIMER

REAL-TIME

CLOCK

AHB-to-VPB

INTERFACE

GENERAL

PURPOSE

ADC

PROCESSOR

FLEXI

SERVO

INTERFACE

AUDIO

DAC LINE

OUTPUTS

ANALOG

LASER

DRIVER

CLOCK

ANALOG

PLL

SLEDGE

STEPPER

MOTOR

DRIVER

DIGITAL

SERVO

INTERFACE

AHB

ADDRESS

DECODER

SAF784X Datasheet(PDF) 4 Page - NXP Semiconductors

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