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SAF784X Datasheet(PDF) 8 Page - NXP Semiconductors

Part # SAF784X
Description  One chip CD audio device with integrated MP3/WMA decoder
PDF  93 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

SAF784X Datasheet(HTML) 8 Page - NXP Semiconductors

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SAF784X_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
8 of 93
NXP Semiconductors
SAF784x
One chip CD audio device with integrated MP3/WMA decoder
DM_CE_1
102
O
external memory chip-select Bank 1
INT1
103
IUH
external interrupt 1
DM_DATA_0
104
B
external memory data input/output bit 0
VSSD3
105
P
digital core ground 3
VDDD3
106
P
digital core supply voltage 3
EF
107
O
C2 error flag
DM_DATA_1
108
B
external memory data input/output bit 1
DATA
109
O
serial data output
DM_DATA_2
110
B
external memory data input/output bit 2
WCLK
111
O
word clock output
DM_DATA_3
112
B
external memory data input/output bit 3
SCLK
113
O
serial clock output
DM_DATA_4
114
B
external memory data input/output bit 4
SYNC
115
O
EFM frame synchronization
DM_DATA_5
116
B
external memory data input/output bit 5
V4/CL16
117
B
versatile pin 4/clock output 16.9344 MHz
DM_DATA_6
118
B
external memory data input/output bit 6
TDI
119
IU
JTAG1/2 test data input
DM_DATA_7
120
B
external memory data input/output bit 7
TMS
121
IU
JTAG1/2 test mode select
DM_DATA_8
122
B
external memory data input/output bit 8
TCK
123
IDH
JTAG1/2 test clock
DM_DATA_9
124
B
external memory data input/output bit 9
TRST
125
IU
JTAG1/2 asynchronous reset (active LOW)
DM_DATA_10
126
B
external memory data input/output bit 10
TDO
127
O
JTAG1/2 test data output
DM_DATA_11
128
B
external memory data input/output bit 11
ARM_JTAG_SEL
129
I
select ARM JTAG (active HIGH) or general JTAG (active LOW)
DM_DATA_12
130
B
external memory data input/output bit 12
RTCK/GPIO30
131
B
JTAG clock output/general purpose I/O 30
DM_DATA_13
132
B
external memory data input/output bit 13
DEV_ROM
133
ID
development ROM select (LOW = internal ROM)
DM_DATA_14
134
B
external memory data input/output bit 14
VSSD4
135
P
digital core ground 4
VDDD4
136
P
digital core supply 4
DM_DATA_15
137
B
external memory data input/output bit 15
MOTO1
138
O
motor output 1
MOTO2
139
O
motor output 2
VSSP3
140
P
digital ground 3 to periphery (pads)
VDDP3
141
P
digital supply voltage 3 to periphery (pads)
Table 2.
Pin description …continued
All digital inputs and bidirectional pins are 5 V tolerant.
Symbol
Pin
Type[1] Description



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