DA7219 datasheet(36/129 Pages) RENESAS

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DA7219

Audio Codec with Advanced Accessory Detect

Datasheet

Revision 3.4

24-Dec-2021

CFR0011-120-00

36 of 128

alc_en control. The ALC monitors the digital signal after the ADC and adjusts the microphones’

analog and digital gain to maintain a constant recording level, whatever the analog input signal level.

Operation of ALC is illustrated in Figure 10. When the input signal volume is high, the ALC system

will reduce the overall gain until the output volume is below the specified maximum value. When the

input signal volume is low, the ALC will increase the gain until the output volume increases above the

specified minimum value. If the output signal is within the desired signal range (between the specified

minimum and maximum levels), the ALC does nothing.

The maximum and the minimum thresholds that trigger a gain change of the ALC are configured via

the alc_threshold_min and alc_threshold_max controls.

ALC Input

ALC Gain

ALC Output

Release time

Attack time

Figure 10: ALC Principle of Operation

The ALC can operate in two modes; Digital-Only mode and Hybrid (combined analog and digital

gain) mode.

In Digital-Only mode only the digital gain in the ADC is altered. Although the ALC is controlling the

gain, it does not modify adc_l_digital_gain in the ADC_L_GAIN register. This register is ignored while

the ALC is in operation. The minimum and maximum levels of digital gain that can be applied by the

ALC are controlled using alc_atten_max and alc_gain_max.

The hybrid analog/digital gain mode (Hybrid mode) can be enabled using alc_sync_mode.

In Hybrid mode, the total gain is made up of an analog gain, which is applied to the microphone

amplifier, and a digital gain, which is implemented in the filtering stage. The ALC block monitors and

controls the gain of the microphone and the ADC.

Hybrid mode offers improved performance and signal tracking over Digital-Only mode. When using

the automatic level control (ALC) in Hybrid mode the DC offset between the digital and analog PGAs

must be cancelled, see Appendix A.2.

Although the ALC is controlling the gain, it does not modify any of the registers MIXIN_L_GAIN or

ADC_L_GAIN, nor does it modify the digital gain register ADC_L_GAIN. These registers are ignored

while the ALC is in operation.

Similarly the minimum and maximum levels of analog gain are controlled by alc_ana_gain_min and

alc_ana_gain_max. The rates at which the gain is changed are defined by the attack and decay rates

in register ALC_CTRL2. When attacking, the gain decreases with alc_attack rate. When decaying,

the gain increases with alc_release rate.

The hold-time is defined by alc_hold in the ALC_CTRL3 register. This controls the length of time that

the system maintains the current gain level before starting to decay. This prevents unwanted

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