DA7219 datasheet(61/129 Pages) RENESAS

61 / 129 page

DA7219

Audio Codec with Advanced Accessory Detect

Datasheet

Revision 3.4

24-Dec-2021

CFR0011-120-00

61 of 128

pointer to the next I2C address, stores the received data and sends an Acknowledge until the master

sends the STOP condition.

S SLAVEaddr W A

REGadr

DATA

S = START condition

A = Acknowledge (low)

Sr = Repeat START condition

* = Not Acknowledge (NAK)

P = STOP condition

W = Write (low)

R = Read (high)

Master to Slave

Slave to Master

7-bits

1 bit

8-bits

DATA

1-bit

8-bits

DATA

……….

8-bits

Repeated writes

Figure 27: I2C Page Write (SDA line)

An alternative Repeated-Write mode that uses non-consecutive slave register addresses is available

using the cif_i2c_write_mode register. In this Repeat Mode (cif_i2c_write_mode = 1), the slave can

be configured to support a host’s repeated write operations into several non-consecutive registers.

Data is stored at the previously received register address. If a new START or STOP condition occurs

within a message, the bus returns to Idle mode. This is illustrated in Figure 28.

S SLAVEaddr W A

REG addr

DATA

S = START condition

A = Acknowledge (low)

Sr = Repeat START condition

* = Not Acknowledge (NAK)

P = STOP condition

W = Write (low)

R = Read (high)

Master to Slave

Slave to Master

7-bits

1 bit

8-bits

REG addr

1-bit

8-bits

DATA

……….

8-bits

Repeated writes

Figure 28: I2C Repeated Write (SDA line)

In Page mode (cif_i2c_write_mode = 0), both Page mode reads and writes using auto-incremented

addresses, and Repeat mode reads and writes using non auto-incremented addresses, are

supported. In Repeat mode (cif_i2c_write_mode = 1) however, only Repeat mode reads and writes

are supported.

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