S29PL-J55BAI011 datasheet(54/96 Pages) SPANSION

54 / 96 page

S29PL-J

S29PL-J_00_A9 September 22, 2006

Data

Sheet

(Adv an ce

Inf o r m a t io n)

13.7

Hardware Data Protection

The command sequence requirement of unlock cycles for programming or erasing provides data protection

against inadvertent writes. In addition, the following hardware data protection measures prevent accidental

erasure or programming, which might otherwise be caused by spurious system level signals during VCC

power-up and power-down transitions, or from system noise.

13.7.1

Low VCC Write Inhibit

When VCC is less than VLKO, the device does not accept any write cycles. This protects data during VCC

power-up and power-down. The command register and all internal program/erase circuits are disabled, and

the device resets to the read mode. Subsequent writes are ignored until VCC is greater than VLKO. The

system must provide the proper signals to the control pins to prevent unintentional writes when VCC is greater

than VLKO.

13.7.2

Write Pulse “Glitch” Protection

Noise pulses of less than 3 ns (typical) on OE#, CE#, (CE1#, CE2# in PL129J) or WE# do not initiate a write

cycle.

13.7.3

Logical Inhibit

Write cycles are inhibited by holding any one of OE# = VIL, CE# (CE1# = CE2# in PL129J)= VIH or WE# =

VIH. To initiate a write cycle, CE# (CE1# / CE2# in PL129J) and WE# must be a logical zero while OE# is a

logical one.

13.7.4

Power-Up Write Inhibit

If WE# = CE# (CE1#, CE2# in PL129J) = VIL and OE# = VIH during power up, the device does not accept

commands on the rising edge of WE#. The internal state machine is automatically reset to the read mode on

power-up.

14. Common Flash Memory Interface (CFI)

The Common Flash Interface (CFI) specification outlines device and host system software interrogation

handshake, which allows specific vendor-specified software algorithms to be used for entire families of

devices. Software support can then be device-independent, JEDEC ID-independent, and forward- and

backward-compatible for the specified flash device families. Flash vendors can standardize their existing

interfaces for long-term compatibility.

This device enters the CFI Query mode when the system writes the CFI Query command, 98h, to address

55h, any time the device is ready to read array data. The system can read CFI information at the addresses

given in Table 14.1 on page 53 to Table 14.4 on page 54. To terminate reading CFI data, the system must

write the reset command. The CFI Query mode is not accessible when the device is executing an Embedded

Program or embedded Erase algorithm.

The system can also write the CFI query command when the device is in the autoselect mode. The device

enters the CFI query mode, and the system can read CFI data at the addresses given in Table 14.1 to

Table 14.4. The system must write the reset command to return the device to reading array data.

For further information, please refer to the CFI Specification and CFI Publication 100. Contact your local sales

office for copies of these documents.

S29PL-J55BAI011 Datasheet(PDF) 54 Page - SPANSION

S29PL-J55BAI011 Datasheet(HTML) 54 Page - SPANSION

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96

Datasheet Download

Link URL