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S29PL-J55BAI011 Datasheet(PDF) 60 Page - SPANSION |
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S29PL-J55BAI011 Datasheet(HTML) 60 Page - SPANSION |
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60 / 96 page ![]() 58 S29PL-J S29PL-J_00_A9 September 22, 2006 Data Sheet (Adv an ce Inf o r m a t io n) Figure 15.1 Program Operation Note See Table 15.1 on page 62 for program command sequence. 15.6 Chip Erase Command Sequence Chip erase is a six bus cycle operation. The chip erase command sequence is initiated by writing two unlock cycles, followed by a set-up command. Two additional unlock write cycles are then followed by the chip erase command, which in turn invokes the Embedded Erase algorithm. The device does not require the system to preprogram prior to erase. The Embedded Erase algorithm automatically preprograms and verifies the entire memory for an all zero data pattern prior to electrical erase. The system is not required to provide any controls or timings during these operations. Table 15.1 on page 62 shows the address and data requirements for the chip erase command sequence. When the Embedded Erase algorithm is complete, that bank returns to the read mode and addresses are no longer latched. The system can determine the status of the erase operation by using DQ7, DQ6, DQ2, or RY/ BY#. Refer to Write Operation Status on page 64 for information on these status bits. Any commands written during the chip erase operation are ignored. Note that Secured Silicon Sector, autoselect, and CFI functions are unavailable when a [program/erase] operation is in progress. However, note that a hardware reset immediately terminates the erase operation. If that occurs, the chip erase command sequence should be reinitiated once that bank has returned to reading array data, to ensure data integrity. Figure 15.2 on page 59 illustrates the algorithm for the erase operation. Refer to the tables in Erase/Program Operations on page 76 for parameters, and Figure 20.8 on page 78 for timing diagrams. START Write Program Command Sequence Data Poll from System Verify Data? No Yes Last Address? No Yes Programming Completed Increment Address Embedded Program algorithm in progress |
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