| Electronic Components Datasheet Search |
|
AS6221T Datasheet(PDF) 26 Page - ams AG |
|
|
|||||||||||||||||||||||||||||
AS6221T Datasheet(HTML) 26 Page - ams AG |
|
26 / 37 page ![]() Document Feedback AS6221T Register Description Datasheet • PUBLIC DS001032 • v1-00 • 2022-Apr-08 37 │ 26 6.3.7 Slave Transmitter The master transmits the slave address with a high R/W bit. In turn, the slave acknowledges a valid slave address. Subsequently, the slave transmits the MSB byte of the actual selected data register by the index register. After the MSB byte transmission, acknowledge is sent by the master. Afterwards, the LSB byte is transmitted by the slave which is also acknowledged by the master after the completed transmission. The data transfer can be terminated by the master by transmitting a Not- Acknowledge after the transmitted slave data or by invoking a START or a STOP condition on the bus. 6.3.8 Alert Function If the device is configured for an interrupt mode operation (IM=1), the ALERT output can be used as an alert signal. If the polarity bit is set to ‘0’ (POL=’0’), the alert condition bit is set to ‘0’ in case the temperature has exceeded the configured value in register THIGH. Accordingly, the alert condition bit is set to ‘1’ if the temperature has fallen below the configured value in register TLOW. If the polarity bit is set to ‘1’ (POL=’1’), the alert condition bit is inverted. The following table summarizes the status of the alert condition bit with different alert conditions and polarity configurations. Figure 30: Alert Condition Bit Polarity Bit Alert Condition Alert Condition Bit (AC-Bit) 0 T ≥ THIGH 0 0 T ≤ TLOW 1 1 T ≥ THIGH 1 1 T ≤ TLOW 0 6.3.9 High Speed Mode The bus operation is limited to 400 kHz unless a high speed command is issued by the master device as the first byte after a START condition. This switches the bus to a high speed operation which allows data transfer frequencies up to 3.4 MHz. Such a command is not acknowledged by the slave but the input filter time constants on the serial interface (SDA and SCL) are adapted to allow the higher transfer rate. After a high speed command, the slave address is transmitted by the master in order to invoke a data transfer. The bus keeps operating at the higher operating frequency until the master issues a STOP condition on the serial bus. Upon the reception of the STOP condition by the slave, the input filters are switched to their initial time constants which allow lower transfer rates only. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |