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CS5467 Datasheet(PDF) 18 Page - Cirrus Logic

Part # CS5467
Description  Four-channel Power/Energy IC
PDF  46 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS5467 Datasheet(HTML) 18 Page - Cirrus Logic

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CS5467
18
DS714A1
ADVANCE RELEASE
All measurements are available as a percentage of full
scale. The format for signed registers is a two’s comple-
ment, normalized value between -1 and +1. The format
for unsigned registers is a normalized value between 0
and 1. A register value of
represents the maximum possible value.
At each instantaneous measurement, the CRDY bit will
be set in the Status Register, and the INT pin will be-
come active if the CRDY bit is unmasked in the Mask
Register
. At the end of each computation cycle, the
DRDY bit will be set in the Status Register, and the INT
pin will become active if the DRDY bit is unmasked in
the Mask Register. When these bits are asserted, they
must be cleared before they can be asserted again.
If the Cycle Count Register (N) is set to 1, all output cal-
culations are instantaneous, and DRDY, like CRDY, will
indicate when instantaneous measurements are fin-
ished. Some calculations are inhibited when the cycle
count is less than 2.
Epsilon (
ε) is the ratio of the input line frequency (f
i) to
the sample frequency (fs) of the ADC.
where fs = MCLK / (K x 1024). With MCLK = 4.096 MHz
and clock divider K = 1, fs = 4000 Hz. For the two
most-common line frequencies, 50 Hz and 60 Hz
and
respectively. Epsilon is used to set the gain of the 90°
phase shift (IIR) filter for the average reactive power cal-
culation.
5.5 Energy Pulse Output
The CS5467 provides three output pins for energy reg-
istration. By default, E1 is used to register average ac-
tive energy measured on channels 1 and 2, E3 is used
to register average reactive energy measured on chan-
nels 1 and 2, and E2 indicates the sign of both active
and reactive energy. (See Figure 2. Timing Diagram for
E1, E2, and E3
on page 13.)
The E1 pulse output is designed to indicate the average
active energy measured on channels 1 and 2. The E2
pin can be used to register average apparent energy
measured on channels 1 and 2 or to indicate the sign of
energy. Table 2 defines the pulse output mode, which is
controlled by bit E2MODE in the Operational Mode Reg-
ister.
The E3 pin can be set to register average reactive ener-
gy measured on channels 1 and 2 (default), PFMON,
voltage channel sign, or average apparent energy mea-
sured on channels 1 and 2. Table 3 defines the pulse
output format, which is controlled by bits E3MODE[1:0]
in the Operational Mode Register.
The pulse output frequencies of E1, E2, and E3 are di-
rectly proportional to the power calculated from the input
signals. The value contained in the PulseRateE Regis-
ter
is the ratio of the frequency of energy-output pulses
to the number of samples, at full scale, which defines
the average frequency for the output pulses. The pulse
width, tpw in Figure 2, is an integer multiple of MCLK cy-
cles approximately equal to:
If MCLK = 4.096 MHz and K = 1 then tpw ≅ 0.25 ms.
5.5.1 Active Energy
The E1 pin produces active-low pulses with an output
frequency proportional to the average active power
measured on channels 1 and 2. The E2 pin is the ener-
gy direction indicator. Positive energy is represented by
E1 pin falling while the E2 is high. Negative energy is
represented by the E1 pin falling while the E2 is low.
The E1 and E2 switching characteristics are specified in
Figure 2. Timing Diagram for E1, E2, and E3 on page
13.
2
23
1
–
()
2
23
------------------------
0.99999988
=
ε f
i fs
⁄
=
ε 50 Hz 4000 Hz
⁄
0.0125
==
ε 60 Hz 4000 Hz
⁄
0.015
==
E2MODE
E2 Output Mode
0
Sign of Energy
1
Apparent Energy
Table 2. E2 Pin Configuration
E3MODE1
E3MODE0
E3 OutPut Mode
0
0
Reactive Energy
01
PFMON
1
0
Voltage Channel Sign
1
1
Apparent Energy
Table 3. E3 Pin Configuration
t
pw
sec
()
1
( MCLK/K ) / 1024
-------------------------------------
≅



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