56F8037 datasheet(97/180 Pages) FREESCALE

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56F8037 Data Sheet, Rev. 2

Freescale Semiconductor

Preliminary

Figure 6-8 CLKO Select Register (SIM_CLKOUT)

6.3.7.1

Reserved—Bits 15–10

This bit field is reserved. Each bit must be set to 0.

6.3.7.2

PWM3—Bit 9

•

0 = Peripheral output function of GPIOA[3] is defined to be PWM3

•

1 = Peripheral output function of GPIOA[3] is defined to be the Relaxation Oscillator Clock

6.3.7.3

PWM2—Bit 8

•

0 = Peripheral output function of GPIOA[2] is defined to be PWM2

•

1 = Peripheral output function of GPIOA[2] is defined to be the system clock

6.3.7.4

PWM1—Bit 7

•

0 = Peripheral output function of GPIOA[1] is defined to be PWM1

•

1 = Peripheral output function of GPIOA[1] is defined to be 2X system clock

6.3.7.5

PWM0—Bit 6

•

0 = Peripheral output function of GPIOA[0] is defined to be PWM0

•

1 = Peripheral output function of GPIOA[0] is defined to be 3X system clock

6.3.7.6

Clockout Disable (CLKDIS)—Bit 5

•

0 = CLKOUT output function is enabled and will output the signal indicated by CLKOSEL

•

1 = CLKOUT output function is disabled

6.3.7.7

Clockout Select (CLKOSEL)—Bits 4–0

CLKOSEL selects clock to be muxed out on the CLKO pin as defined in the following. Internal delay to

CLKO output is unspecified. Signal at the output pad is undefined when CLKO signal frequency exceeds

the rated frequency of the I/O cell. CLKO may not operate as expected when CLKDIS and CLKOSEL

settings are changed.

•

00000 = Continuous system clock

•

00001 = Continuous peripheral clock

•

00010 = 3X system clock

•

00100.....11111 = Reserved for factory test

Base + $A

Read

PWM3PWM2PWM1PWM0

CLK

DIS

CLKOSEL

Write

RESET

0000

56F8037 Datasheet(PDF) 97 Page - Freescale Semiconductor, Inc

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