MP5981

– 16V, 50A, 1.1mΩ RDS(ON), HOT-SWAP INTELLI-FUSE SOLUTION

MP5981 Rev. 1.3

MonolithicPower.com

21

5/16/2022

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VTEMP OUT

GND

VIN

MP5981

VOUT

VIN

VTEMP OUT

GND

VIN

MP5981

VTEMP

Temperature

ADC

Controller

Figure 11: Multi-Fuse Temperature Sense

Utilization in Paralleling

Thermal Protection

The Intelli-Fuse temperature is sensed by

internally monitoring the junction temperature of

the IC. The temperature information can be

read from VTEMP.

The Intelli-Fuse has thermal protection. When

the junction temperature exceeds the threshold

(143°C), the power FET is turned off, and GOK

is pulled low.

VDD3 Sub-Regulator

The MP5981 has an internal 3.0V linear sub-

regulator that steps down the input voltage to

generate a 3.0V power supply. VDD3 can be

driven with an external 3.3V to reduce sub-

regulator loss from VIN.

Under-Voltage Lockout (UVLO) Protection

The MP5981 has two under-voltage lockout

(UVLO) protections: a 2.41V VDD3 UVLO and

a 2.91V VIN UVLO. The MP5981 can start up

only when both VDD3 and VIN exceed their

respective UVLO thresholds. The MP5981

shuts down when either the VDD3 voltage is

below the UVLO falling threshold (typically

2.04V) or VIN is below the VIN falling threshold

(2.58V). These UVLO protections are not latch-

off protections.

Mode Pin (8)

The MP5981 has the ability to operate in latch

or hiccup mode. Connecting pin 8 to ground

puts the MP5981 into hiccup mode operation.

By default, the MODE pin is pulled high by

internal weak pull up and operates in latch

mode. When operating in hiccup mode, the

MP5981 auto-restarts after any fault condition

occurs with a fixed 560ms retry time (see

Figure 12).

560ms

GOK

FET On

FET Off

VOUT

t

Figure 12: Auto-Retry Operation

To ensure all the devices are in parallel, enable

the devices at the same time. ON/PD and GOK

must be connected (see Figure 13).

GOK

OUT

GND

ON/PD

MP5981

VOUT

GOK

OUT

GND

ON/PD

MP5981

VDD3

Figure 13: GOK and ON/PD Connection Parallel

Devices

During retry, the GOK pin is kept low until the

560ms retry time has expired, at which time

GOK is released and the connected ON/PD pin

rises again, which enables all devices in parallel

at the same time.