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RT5510WSC Datasheet(PDF) 37 Page - Richtek Technology Corporation |
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RT5510WSC Datasheet(HTML) 37 Page - Richtek Technology Corporation |
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37 / 52 page ![]() RT5510 Copyright © 2019 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation DS5510-00 October 2019 www.richtek.com 37 Register Table Registers Description Address Byte Bits Bits Name Default Type Description 0x00 2 15:12 Reserved 0000 R Reserved 11:8 DEVICE_ID 0000 R/W Device ID 7:0 CHIP_ID[7:0] 11100000 R Chip Revision ID E0 : First version E1 : 2nd version E2 : 3rd version ….. 0x01 1 7:5 Reserved 000 R Reserved 4 PLL_LOCK 0 R 0 : PLL is locked to BCK (default) 1 : PLL is unlocked to BCK 3 BCK_CLOCK_STABLE 0 R 0 : BCK rate stable (default) 1 : BCK rate unstable 2 BCK_VALID 0 R 0 : BCK stable and match with BCK_MODE setting (default) 1 : BCK unstable and miss match with BCK_MODE setting 1 BCK_LOSS 0 R 0 : BCK no loss(default) 1 : BCK loss 0 LRCK_LOSS 0 R 0 : LRCK no loss(default) 1 : LRCK loss 0x03 1 7 SW_RESET 0 R/W 0 : Chip doesn’t Software reset (default) 1 : Chip reset by Software reset 6:4 Reserved 000 R Reserved 3 AMPDS 0 R/W Soft off mode enable 0 : Enter soft mode before off mode (enable ramp control) (default) 1 : Enter off mode directly (disable ramp control) 2 AMPE 0 R/W Class-D enable 0 : Disable Class-D (default) 1 : Enable Class-D 1 SPKM 0 R/W 0 : Unmute (default) 1 : Force speaker mute (with ramp control) 0 PWDN 1 R/W Chip power down control 0 : Chip enable 1 : Chip power down (default) |
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