RT5510WSC datasheet(12/52 Pages) RICHTEK

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RT5510

is a registered trademark of Richtek Technology Corporation

www.richtek.com

DS5510-00

October

2019

2C Interface

Device Addressing

The RT5510 supports I2C control interface. The default device address is accessed via ADS1 pin and WDT/ADS2

pin, see Table 2. Address selection via ADS1 pin and WDT/ADS2 pin with four separate address are supported for

stereo mode application. The levels on ADS1 pin and WDT/ADS2 pin determine the values of bits 1 and 2,

respectively. Note that the RT5510 always monitors the level of ADS1 to change its I2C ID, but the RT5510 will latch

the level of WDT/ADS2 once 768

s after the edge of RSTN pin or analog POR goes from low to high or software

reset from high to low.

Table 2. Address Selection Via Pins ADS1 and WDT/ADS2

WDT/ADS2 Pin (V)

ADS1 Pin (V)

Address

Function (bit 0)

0110100x (34H)

0 : write, 1 : read

DVDD

0110101x (35H)

0 : write, 1 : read

DVDD

0110110x (36H)

0 : write, 1 : read

DVDD

0110111x (37H)

0 : write, 1 : read

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0 = LSB

WDT/ADS2

ADS1

Bit 0 = LSB

I2C bus wiring is very simple. Only two signal lines SDA (Serial Data Line, Data or address signal) and SCL (Serial

Clock Line, Clock signal) are used to perform serial communication between integrated circuits in the system.

The corresponding I2C communication pins in the RT5510 are SDA and SCL.

Typical I2C format is (Start)-[Slave Address]-[Register Address]-[Data]-(Stop). After writing the slave address first, it

needs to be written again to specify the register address for reading and writing. The start and stop conditions of I2C

are determined by the SDA transition state, while SCL is at logic high level. When SCL is high, the SDA transition

from high to low is Start condition. Otherwise, SDA transition from low to high is Stop condition. The I2C Bus protocol

stipulates that in addition to the start signal and the stop signal, all signal transmissions are fixed in groups of 8 bits

(1 Byte), and the MSB is sent first. After each group (8 bits) signal is sent, the sender needs to read an ACK bit

(acknowledged) that the receiver responds. ACK low indicates that the data has been received. ACK is an important

basis for judging whether the communication between Master/Slave is normal. For valid I2C data read or write, SDA

must keep the signal stable and can’t change state when SCL is high in order to correctly read (latch) the data. SDA

only allows transitions when SCL is low level.

The serial interface also supports single-byte and multiple-byte read/write function. Please refer to the next

paragraph for the RT5510 Read / Write function description.

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