TAS5518 datasheet(46/103 Pages) TI

46 / 103 page

TAS5518 Controls and Status

SLES115 — August 2004

TAS5518

•

Recovery from Clock Error

•

Power Supply Volume Control Enable

•

Volume and Mute Update Rate

•

Modulation Index Limit

•

Inter-channel Delay

•

Master Clock and Data Rate Controls

•

Bank Controls

2.3.1 Channel Configuration Registers

In order for the TAS5518 to have full control of the power stages, registers 0x05 to 0x0C must be programmed

to reflect the proper power stage and how each one should be controlled. Channel configuration registers

consist of eight registers, one for each channel.

The primary reason for using these registers is that different power stages require different handling during

start up, mute/unmute, shutdown, and error recovery. The TAS5518 must select the sequence that gives the

best click and pop performance and insure that the bootstrap capacitor is charged correctly during start up.

This sequence depends on which power stage is present at the TAS5518 output.

Table 2−5. Description of the Channel Configuration Registers (0x05 to 0x0C)

BIT

DESCRIPTION

Enable/disable error recovery sequence. In case the BKND_RECOVERY pin is pulled low, this register determines if this channel is

to follow the error recovery sequence or to continue with no interruption.

Determines if the power stage needs the TAS5518 VALID pin to go low to reset the power stage. Some power stages can be reset

by a combination of PWM signals. For these devices, it is recommended to set this bit low, since the VALID pin is shared for power

stages. This provides better control of each power stage.

Determines if the power stage needs the TAS5518 VALID pin to go low to mute the power stage. Some power stages can be muted

by a combination of PWM signals. For these devices, it is recommended to set this bit low, since the VALID pin is shared for power

stages. This provides better control of each power stage.

Inverts the PWM output. Inverting the PWM output can be an advantage if the power stage input pin are opposite the TAS5518 PWM

pinout. This makes routing on the PCB easier. To keep the phase of the output the speaker terminals must also be inverted.

The power stage TAS5182 has a special PWM input. To ensure that the TAS5518 has full control in all occasions, the PWM output

must be remapped.

Can be used to handle click and pop for some applications.

This bit is normally used together with D2. For some power stages, both PWM signals must be high to get the desired operation of

both speaker outputs to be low. This bit sets the PWM outputs high-high during mute.

Not used

TAS5518 Datasheet(PDF) 46 Page - Texas Instruments

TAS5518 Datasheet(HTML) 46 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL