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AD9549BCPZ Datasheet(PDF) 65 Page - Analog Devices

Part # AD9549BCPZ
Description  Dual Input Network Clock Generator/Synchronizer
PDF  78 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9549BCPZ Datasheet(HTML) 65 Page - Analog Devices

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Preliminary Technical Data
AD9549
Rev. PrA | Page 65 of 78
0500
Harmonic Spur Reduction
0500
M
HSR-A
Enable
Gain
Spur A Harmonic [3:0]
00
0501
M
Spur A Magnitude [7:0]
00
0502
M
00
0503
M
Spur A Phase [7:0]
00
0504
M
Spur A
Spur A
Phase [8]
00
0505
M
HSR-B
Enable
Gain
Spur B Harmonic [3:0]
00
0506
M
Spur B Magnitude [7:0]
00
0507
M
00
0508
M
Spur B Phase [7:0]
00
0509
M
Spur B
Spur B
Phase [8]
00
1 Types of Registers:
M: Mirrored (also called Buffered). This type of register needs an IO_UPDATE for the new value to take effect.)
RO: Read-Only
AC: Auto-clear



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