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83C795 Datasheet(PDF) 20 Page - SMSC Corporation

Part # 83C795
Description  Ethernet System Controller
PDF  136 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

83C795 Datasheet(HTML) 20 Page - SMSC Corporation

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Mnemonic
Pin Number I/O
Description
LA17-LA23
13-19
I/O
PC LA ADDR E SS BUS. Advanced timing vers ion of s ys tem
address lines A23-A17 from PC/AT bus. T hese are not assumed to
be s table during the entire hos t cycle and are latched internally by
the BALE signal (falling edge). T hese s ignals are active high.
LLE D
131
I/O
T WPR LINK S T AT US . If valid data or Link Tes t puls es are received
on T PR+ / T PR-, LLE D is low (link s tatus OK). When no data or
Link Tes t puls es are received, LLE D is high. T he LLE D pin can
sink 4mA to drive an external LE D. T his pin als o functions as the
EER OM clock pin (formerly EES K) and functions as the s hift
control pin (formerly S HIF T IN) in scan mode.
M16CS
26
O
ME MOR Y 16 S E LE CT E D. Active low. Indicates to the PC/AT bus
that R AM access response is 16 bits wide.
MA15-MA10 139-144
O
ME MOR Y ADDR E S S LINE S . T hese pins bring out the DMA
addres s to memory or feed-through the hos t addres s as modified
for paging. When dumping R OM contents , thes e pins pres ent
ROM data bits :
MA15 R OM30 then R OM31
MA14 R OM28 then R OM29
. . .
MA00 R OM00 then R OM01
MA09/JMP9
MA08/JMP8
MA07/JMP7
MA06/JMP6
MA05/JMP5
MA04/JMP4
MA03/JMP3
MA02/JMP2
MA01/JMP1
MA00/JMP0
145
146
148
149
150
151
152
153
154
155
I/O
S ame as other MA lines except that during R E S E T, the drivers are
disabled and the INIT jumpers are read through thes e pins and
latched at the trailing edge of R E S E T. T hey are active high and are
pulled up weakly by internal res is tors (35k
Ω–150kΩ).
To s et a zero value on thes e pins , us e an external pull-down
res is tor of 3.6K
Ω.
MD7
MD6-MD0
158
3-9
I/O
ME MOR Y DAT A LINE S . T hese pins connect to the data pins of the
buffer R AM and the IPL or boot R OM.
ME MR
12
I/O
PC ME MOR Y R E AD for addres s es exceeding 1 M. Active low.
ME MW
10
I/O
PC ME MOR Y WR IT E for addres s es exceeding 1 M. Active low.
OS R
112
I
VCO BIAS R E S IS T OR . A res is tor from OS R to VCC bias es the
internal VCO current. Nominal value is 24.9K
Ω..
R AMOE
156
O
R AM OUT PUT E NABLE . Active low.
R AMWR
157
O
R AM WR IT E E NABLE . Active low.
RE S E T
95
I/O
SYST E M R E SE T. Active high.
TABLE 4-1. 83C795 PIN ASSIGNMENTS (CONT.)
PIN LIST
83C795
7



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