83C795 datasheet(86/136 Pages) SMSC

86 / 136 page

• Data field

• CRC field

E ach of these fields is explained in the following

sections .

7.4.9.1

Start of Frame

T he preamble field is us ed to train the Manches ter

decoder and to detect carrier. If carrier is detected,

preamble pas s es through the receive deserializer

which di s car ds it whil e s ear ching for the

S tart-of-F rame Delimiter (S F D) s ymbol. On

detecting a good S F D, a VALID_F R AME s ignal is

as serted and the receive F IF O is cleared to accept

the received frame. T he receive F IF O is loaded by

the des erializer with octets (bytes ) s tarting with the

firs t bit after S FD.

While the destination addres s (DA field) is being

checked for recognition, the receive DMA is

dis abled. If the addres s is recognized, the DMA is

enabled and trans fer to memory begins when the

F IF O fills to the programmed burs t level. If the

frame’s addres s is not recognized, the receive unit

clears out the F IF O, s tops fillingit, andwaits for the

start of the next frame.

T he s ource addres s and data fields are pas sed to

buffer memory. In some protocols , the firs t 2 bytes

of thedatafielddenoteaframelength. T hes ebytes

are not interpreted by the S MC795. T hey are

treated as ordinary data.

7.4.9.2

End of Frame

If there is a los s of carrier s ense, 3 dribble clocks

(receive clocks that occur after the los s of carrier

s ens e) are needed to ens ure the s ynchronizations

of all lines ignals tothereceiver circuits . When using

the internal Manchester decoder (either 10BAS E -T

or AUI interfaces ), this decoder automatically

supplies sufficient dribble clocks to the receiver to

complete proces s ing of the frame. When the

Manchester decoder is bypass ed, it is necessary to

s upply dribble clocks at the XR XC pin after XCR S

terminates.

T he CR C from the received frame is s ent to

memory with the frame via DMA and is included in

the byte count pos ted in the buffer header.

If the receive unit detects errors in the frame (s uch

as an incorrect CR C, an alignment problem, a

fores hortened frame), it can abort reception

dependingon the configuration of theS aveE rrored

Packets and Accept R unt F rames bits of the

Receive Configuration Register - RCON.S E P and

R CON.R UNT S res pectively. Certain other types of

errors (includingFIFOoverflowandR eceiver Buffer

Overwrite)

always abort reception.

If reception is aborted, the DMA controller s tops

s ending bytes to the buffer, the R eceive S tatus

R egis ter (R S R ) and the Interrupt S tatus R egis ter

(IS R ) areupdated, andthereceiveunit waits for the

next frame to begin.

No buffer header will be pos ted for the frames that

have not been accepted; the previous contents of

the header location will remain unchanged.

T he received packet length s hould be les s than

32,764 bytes , including DA, S A, data, and CR C.

T he receiver does not reject longer frames but it

may be hard to fit the contents into available buffer

s pace. T he buffer ring mus t always have enough

s pace to contain the entire frame with a 4-byte

header. Packets larger than the available buffer

s pace will not be received, regardles s of the S E P

bit in the R CON R egis ter. S uch frames will be

posted as ring overwrites and caus es the OVW

interrupt to be s et.

R eceiver interrupts (R XE for frames with errors and

PR X for frames without errors ) indicate the DMA

has completely pos ted the frame to memory. If the

DMA aborts , thes e interrupts are not set for the

current frame. If s et previous ly, they remain

unchanged. Packets s horter than 64 bytes will be

r eceived only when the Accept R unts bit

(R CON.R UNT S ) is enabled.

7.4.10 Receiver Blinding

T he R eceiver Carrier S ens e function is blinded for

a period of 4.0

µsecstarting at the endof (XCRS +

XCOL) when the device has trans mitted a frame.

T his allows the heartbeat to be detected without

res etting the deference timer and ens ures that an

improperly-s paced frame will not interfere with

proper pos ting of s tatus for a new reception.

LAN CONTROLLER OVERVIEW

83C795

83C795 Datasheet(PDF) 86 Page - SMSC Corporation

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