C8051F340 datasheet(34/288 Pages) SILABS

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C8051F340/1/2/3/4/5/6/7

Rev. 1.0

Other electrical characteristics tables are found in the data sheet section corresponding to the associated

peripherals. For more information on electrical characteristics for a specific peripheral, refer to the page

indicated in Table 3.2.

IDD Frequency Sensitivity3,6

VDD = 3.3 V, SYSCLK < 1 MHz,

T = 25 ºC

VDD = 3.3 V, SYSCLK > 1 MHz,

T = 25 ºC

VDD = 3.6 V, SYSCLK < 1 MHz,

T = 25 ºC

VDD = 3.6 V, SYSCLK > 1 MHz,

T = 25 ºC

0.44

0.32

0.49

0.36

mA/MHz

Digital Supply Current (Stop

Mode, shutdown)

Oscillator not running,

VDD monitor disabled

< 0.1

µA

Digital Supply Current for USB

Module (USB Active Mode)

VDD = 3.3 V, USB Clock = 48 kHz

VDD = 3.6 V, USB Clock = 48 kHz

8.69

9.59

Digital Supply Current for USB

Module (USB Suspend Mode)

Oscillator not running

VDD monitor disabled

< 0.1

µA

Notes:

1. USB Requires 3.0 V Minimum Supply Voltage.

2. SYSCLK must be at least 32 kHz to enable debugging.

3. Based on device characterization of data; Not production tested.

4. Active and Inactive IDD at voltages and frequencies other than those specified can be calculated using the IDD

Supply Sensitivity. For example, if the VDD is 3.0 V instead of 3.3 V at 24 MHz: IDD = 13.9 mA typical at 3.3 V

and SYSCLK = 24 MHz. From this, IDD = 13.9 mA + 0.46 x (3.0 V – 3.3 V) = 13.76 mA at 3.0 V and SYSCLK

= 24 MHz.

5. IDD can be estimated for frequencies < 30 MHz by multiplying the frequency of interest by the frequency

sensitivity number for that range. When using these numbers to estimate IDD for > 30 MHz, the estimate should

be the current at 24 MHz (or 48 MHz) minus the difference in current indicated by the frequency sensitivity

number. For example: VDD = 3.3 V; SYSCLK = 35 MHz, IDD = 13.9 mA – (24 MHz – 35 MHz) x 0.44 mA/MHz =

18.74 mA.

6. Idle IDD can be estimated for frequencies < 1 MHz by multiplying the frequency of interest by the frequency

sensitivity number for that range. When using these numbers to estimate Idle IDD for > 1 MHz, the estimate

should be the current at 24 MHz (or 48 MHz) minus the difference in current indicated by the frequency

sensitivity number. For example: VDD = 3.3 V; SYSCLK = 5 MHz, Idle IDD = 8.25 mA – (24 MHz – 5 MHz) x

0.32 mA/MHz = 2.17 mA.

Table 3.1. Global DC Electrical Characteristics (Continued)

–40 to +85 °C, 25 MHz System Clock unless otherwise specified.

Parameter

Conditions

Min

Typ

Max

Units

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