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TMD2712 Datasheet(PDF) 26 Page - OSRAM GmbH |
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TMD2712 Datasheet(HTML) 26 Page - OSRAM GmbH |
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26 / 54 page ![]() Datasheet, Public Page 25 [v4-00] 2023-Jan-02 Document Feedback TMD2712 − Register Description PCFG1 Register (Address 0x8F) Figure 32: PCFG1 Register PCFG2 Register (Address 0x90) Figure 33: PCFG2 Register Addr: 0x8F PCFG1 Bit Bit Name Default Access Bit Description 7:6 PPULSE_ LENH 00 RW These bits are the 2 most significant bits of the 10-bit Pulse Length control setting. The lower 8 bits are in the PCFG2 register. See the PCFG2 register for details. 5:4 Reserved 11 RW Reserved. Must be set to default value. 3:0 PLDRIVE 2 (0010) RW This field sets the drive strength of the IR VCSEL current. Values are approximate; actual current through the VCSEL is factory trimmed to normalize IR intensity. For lowest part to part variation, 8mA is recommended. Value VCSEL Current 5 (0101) 7mA 6 (0110) 8mA 7 (0111) 9mA 8 (1000) 10mA All other values Reserved Addr: 0x90 PCFG2 Bit Bit Name Default Access Bit Description 7:0 PPULSE_LENL 0x20 RW These bits are the 8 least significant bits of the 10-bit Pulse Length control setting. The upper 2 bits are in the PCFG1 register. The minimum pulse length is 4μs. Value Pulse Length 3 (0000000011) 4μs 32 (0000100000) 33μs Pulse Length = (PULSE_LEN + 1) μs 1023 (1111111111) 1024μs |
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