AD7367 datasheet(24/28 Pages) AD

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AD7366/AD7367

Rev. 0 | Page 24 of 28

MICROPROCESSOR INTERFACING

The serial interface on the AD7366/AD7367 allows the parts

to be directly connected to a range of different microprocessors.

This section explains how to interface the AD7366/AD7367

with some more common microcontrollers and DSP serial

interface protocols.

AD7366/AD7367 TO ADSP-218x

The ADSP-218x family of DSPs interfaces directly to the

AD7366/AD7367 without any glue logic required. The V

DRIVE

pin of the AD7366/AD7367 takes the same supply voltage as

that of the ADSP-218x. This allows the ADC to operate at a

higher supply voltage than its serial interface and therefore, the

ADSP-218x, if necessary. This example shows both DOUTA and

DOUTB of the AD7366/AD7367 connected to both serial ports

of the ADSP-218x. The SPORT0 and SPORT1 control registers

should be set up as shown in Table 11 and Table 12.

Table 11. SPORT0 Control Register Setup

Setting

Description

TFSW = RFSW = 1

Alternate framing

INVRFS = INVTFS = 1

Active low frame signal

DTYPE = 00

Right justify data

SLEN = 1111

16-bit data-word (or can be set to 1101

for 14-bit data-word)

ISCLK = 1

Internal serial clock

TFSR = RFSR = 1

Frame every word

IRFS = 0

ITFS = 1

Table 12. SPORT1 Control Register Setup

Setting

Description

TFSW = RFSW = 1

Alternate framing

INVRFS = INVTFS = 1

Active low frame signal

DTYPE = 00

Right justify data

SLEN = 1111

16-bit data-word (or can be set to 1101

for 14-bit data-word)

ISCLK = 0

External serial clock

TFSR = RFSR = 1

Frame every word

IRFS = 0

ITFS = 1

The connection diagram is shown in Figure 29. The ADSP-218x

has the TFS0 and RFS0 of the SPORT0 and the RFS1 of SPORT1

tied together. TFS0 is set as an output, and both RFS0 and RFS1

are set as inputs. The DSP operates in alternate framing mode,

and the SPORT control register is set up as described in

Table 13 and Table 14. The frame synchronization signal

generated on the TFS is tied to CS.

AD7366/

AD7367*

SCLK

ADSP-218x*

*ADDITIONAL PINS OMITTED FOR CLARITY.

SCLK0

DR0

RFS0

TFS0

DOUTA

VDRIVE

VDD

DOUTB

DR1

RFS1

SCLK1

IRQ

BUSY

CNVST

FLO

Figure 29. Interfacing the AD7366/AD7367 to the ADSP-218x

The AD7366/AD7367 BUSY line provides an interrupt to

the ADSP-218x when the conversion is complete. The conver-

sion results can then be read from the AD7366/AD7367 using

a read operation. When an interrupt is received on IRQ from

the BUSY signal, a value is transmitted with TFS/DT (ADC

control word). The TFS is used to control the RFS and, hence,

the reading of data.

AD7366/AD7367 TO ADSP-BF53x

The ADSP-BF53x family of DSPs interfaces directly to the

AD7366/AD7367 without any glue logic required. The avail-

ability of secondary receive registers on the serial ports of the

Blackfin® DSPs means only one serial port is necessary to read

from both DOUTA and DOUTB pins simultaneously. Figure 30

shows both DOUTA and DOUTB of the AD7366/AD7367 con-

nected to Serial Port 0 of the ADSP-BF53x. The SPORT0

Receive Configuration 1 register and SPORT0 Receive

Configuration 2 register should be set up as outlined in

Table 13 and Table 14.

SERIAL

DEVICE A

(PRIMARY)

SERIAL

DEVICE B

(SECONDARY)

AD7366/

AD7367*

DOUTA

SCLK

ADSP-BF53x*

*ADDITIONAL PINS OMITTED FOR CLARITY.

DR0PRI

PFN

RFS0

VDRIVE

VDD

CNVST

RCLK0

RXINTS

BUSY

DR0SEC

DOUTB

SPORT0

Figure 30. Interfacing the AD7366/AD7367 to the ADSP-BF53x

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