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56853 Datasheet(PDF) 37 Page - Freescale Semiconductor, Inc |
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56853 Datasheet(HTML) 37 Page - Freescale Semiconductor, Inc |
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37 / 60 page ![]() Host Interface Port 56853 Technical Data, Rev. 6 Freescale Semiconductor 37 Figure 4-17 Controller-to-Host DMA Read Mode Access time TRADV — 13 ns 4-18 4-19 Disable time TRADX 5 — ns 4-18 4-19 Disable time TRADZ 3 — ns 4-18 4-19 Setup time TDACKS 3 — ns 4-20 Hold time TACKDH 1 — ns 4-20 Setup time TADSS 3 — ns 4-21 4-22 Hold time TDSAH 1 — ns 4-21 4-22 Pulse width TWDS 5 — ns 4-21 4-22 Time to re-assert 1. After second write in 16-bit mode 2. After first write in 16-bit mode or after write in 8-bit mode TACKREQL 4T + 5 5 5T + 9 13 ns ns 4-17, 4-20 1. The formulas: T = clock cycle. f ipb = 60MHz, T = 16.7ns. Table 4-9 Host Interface Port Timing1 Operating Conditions: VSS = VSSIO = VSSA = 0 V, VDD = 1.62-1.98V, VDDIO = VDDA = 3.0–3.6V, TA = –40° to +120°C, CL ≤ 50pF, fop = 120MHz Characteristic Symbol Min Max Unit See Figure HACK HD HREQ TACKDV TACKDZ TREQACKL TACKREQL TACKREQH |
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