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56853 Datasheet(PDF) 17 Page - Freescale Semiconductor, Inc |
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56853 Datasheet(HTML) 17 Page - Freescale Semiconductor, Inc |
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17 / 60 page ![]() Introduction 56853 Technical Data, Rev. 6 Freescale Semiconductor 17 106 HACK HRRQ GPIOB15 Input Open Drain Output Input/Output Host Acknowledge (HACK)—When the HI08 is programmed for HRMS=0 functionality (typically used on a single-data-strobe bus), this input has two functions: (1) provide a Host Acknowledge signal for DMA transfers or (2) to control handshaking and provide a Host Interrupt Acknowledge compatible with the MC68000 family processors. These pins are disconnected internally. Receive Host Request (HRRQ)—This signal is the Receive Host Request output when the HI08 is programmed for HRMS=1 functionality and is typically used on a double-data-strobe bus. Port B GPIO(15)—This pin is a General Purpose I/O (GPIO) pin when not configured for host port usage. 101 TIO0 GPIOG0 Input/Output Input/Output Timer Input/Outputs (TIO0)—This pin can be independently configured to be either a timer input source or an output flag. Port G GPIOG0—This pin is a General Purpose I/O (GPIO) pin that can individually be programmed as an input or output pin. 99 TIO1 GPIOG1 Input/Output Input/Output Timer Input/Outputs (TIO1)—This pin can be independently configured to be either a timer input source or an output flag. Port G GPIO (1)—This pin is a General Purpose I/O (GPIO) pin that can individually be programmed as an input or output pin. 98 TIO2 GPIOG2 Input/Output Input/Output Timer Input/Outputs (TIO2)—This pin can be independently configured to be either a timer input source or an output flag. Port G GPIO (2)—This pin is a General Purpose I/O (GPIO) pin that can individually be programmed as an input or output pin. 97 TIO3 GPIOG3 Input/Output Input/Output Timer Input/Outputs (TIO3)—This pin can be independently configured to be either a timer input source or an output flag. Port G GPIO (3)—This pin is a General Purpose I/O (GPIO) pin that can individually be programmed as an input or output pin. 20 IRQA Input External Interrupt Request A and B—The IRQA and IRQB inputs are asynchronous external interrupt requests that indicate that an external device is requesting service. A Schmitt trigger input is used for noise immunity. They can be programmed to be level-sensitive or negative-edge- triggered. If level-sensitive triggering is selected, an external pull-up resistor is required for Wired-OR operation. 21 IRQB 15 MODA GPIOH0 Input Input/Output Mode Select (MODA)—During the bootstrap process MODA selects one of the eight bootstrap modes. Port H GPIO (0)—This pin is a General Purpose I/O (GPIO) pin after the bootstrap process has completed. Table 3-1. 56853 Signal and Package Information for the 128-pin LQFP (Continued) Pin No. Signal Name Type Description |
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