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56F8366 Datasheet(PDF) 133 Page - Freescale Semiconductor, Inc |
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56F8366 Datasheet(HTML) 133 Page - Freescale Semiconductor, Inc |
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133 / 184 page ![]() Stop and Wait Mode Disable Function 56F8366 Technical Data, Rev. 6 Freescale Semiconductor 133 Preliminary 6.8 Stop and Wait Mode Disable Function Figure 6-17 Internal Stop Disable Circuit The 56800E core contains both STOP and WAIT instructions. Both put the CPU to sleep. For lowest power consumption in Stop mode, the PLL can be shut down. This must be done explicitly before entering Stop mode, since there is no automatic mechanism for this. When the PLL is shut down, the 56800E system clock must be set equal to the prescaler output. Some applications require the 56800E STOP and WAIT instructions be disabled. To disable those instructions, write to the SIM control register (SIM_CONTROL) described in Part 6.5.1. This procedure can be on either a permanent or temporary basis. Permanently assigned applications last only until their next reset. 6.9 Resets The SIM supports four sources of reset. The two asynchronous sources are the external RESET pin and the Power-On Reset (POR). The two synchronous sources are the software reset, which is generated within the SIM itself by writing to the SIM_CONTROL register, and the COP reset. Reset begins with the assertion of any of the reset sources. Release of reset to various blocks is sequenced to permit proper operation of the device. A POR reset is first extended for 221 clock cycles to permit stabilization of the clock source, followed by a 32 clock window in which SIM clocking is initiated. It is then followed by a 32 clock window in which peripherals are released to implement Flash security, and, finally, followed by a 32 clock window in which the core is initialized. After completion of the described reset sequence, application code will begin execution. Resets may be asserted asynchronously, but they are always released internally on a rising edge of the system clock. D-FLOP DQ C D-FLOP D Q C R 56800E STOP_DIS Permanent Disable Reprogrammable Disable Clock Select Reset Note: Wait disable circuit is similar |
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