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33797 Datasheet(PDF) 30 Page - Freescale Semiconductor, Inc |
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33797 Datasheet(HTML) 30 Page - Freescale Semiconductor, Inc |
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30 / 34 page ![]() Analog Integrated Circuit Device Data 30 Freescale Semiconductor 33797 FUNCTIONAL DEVICE OPERATION PROTECTION AND DIAGNOSIS FEATURES FET DRIVER CURRENT LIMIT A single resistor is used to set the current limit protection of the high-side drivers of both squib channels. The low-side current limit is never less than the high-side current limit. Example of current limit conditions: RR_LIMIT_X =10 kΩ, IHS= A ± A The high-side driver controls the current through the squib. The current limit for the low-side driver is only to protect the low-side driver stage from excessive current in the event of a short to battery. With RR_LIMIT_X conditions <4.32 kΩ or shorted to ground, the current limit will default to the RR_LIMIT_X = 10 kΩ current limit, not to exceed. With RR_LIMIT_X resistance value >60 kΩ or open, the current limit will default to the RR_LIMIT_X = 10 kΩ maximum current limit. FET DRIVER CURRENT LIMIT MEASUREMENT ($7X COMMAND) This function measures the firing current in each squib line and records the “ON” time in which the IMEAS is above the threshold for each squib. (Refer to Dynamic Electrical Characteristics table, page 13.) The timing registers can be reset via SPI command so additional current measurements can be made. An 8-bit message will be used to determine 255 time steps. The driver current limit measurement is activated when each individual high-side driver is activated. Each time the squib current is measured above the IMEAS threshold during the timer activation, a status bit will be set to “1”. If the current measured is not above the IMEAS threshold during the timer activation, the timing data log bit will not increment. Each squib timing register can be reset via SPI command so additional current measurements can be made. Initial squib IC power-up will reset the timing registers (i.e., “Power-ON Reset”). When reset, the current limit measurement register byte will be set to $00. Command $79 will indicate the status of the current limit measurement comparator. The current limit measurement from the test is captured and loaded into the register on the next valid SPI command. When the firing current is above IMEAS, the current limit is activated and the status bit will be set to “1”. If the firing current is below IMEAS, the current limit status bit will be set to “0”. FET DRIVER CURRENT LIMIT MEASUREMENT RESET COMMAND ($3X COMMAND) The current limit status registers can be individually reset with the command set found in Table 8. When the register bit is set to “1” for squib X, the current measurement register will be reset to $00. SQUIB DRIVER THERMAL SHUTDOWN ($7F COMMAND) With a nominal squib load, the FET squib driver will not enter thermal shutdown until the driver has been active for a minimum of 2.09 ms. The individual squib driver thermal shutdown will not affect other squib drivers firing “ON” times. With a shorted squib load, the FET squib driver will not enter thermal shutdown until the driver has been active for a minimum of 2.090 ms. For the shorted squib load, the associated FET squib driver may enter thermal shutdown with an “ON” time of 2.09 ms ≤ t ON ≤ 2.82 ms. When the thermal shutdown limit is exceeded, the thermal status will be set to “1”. The thermal shutdown status ($7F) diagnostics latch the thermal bit status when executed. The Squib Driver Thermal shutdown status latch will be cleared after the information is transmitted on the next valid SPI command (i.e., TX: NOP or next $7F, latch cleared on rising edge of chip select). The FET squib driver can be activated through the arm/fire command when the TEMPRENABLE (MIN) is reached (thermal shutdown status “0”). VTRANTSTX, HIGH- AND LOW-SIDE SQUIB DRIVER FET TEST and STATUS ($82 TO $83 COMMAND) This function checks the squib driver FET transistor status. The high- and low-side squib driver FET test requires FEN_1 and FEN_2 pins to be low and two separate 8-bit write commands to be made to the shift register. With the FEN_1 and FEN_2 pins status LOW, the first write is to unlock in preparation of receiving the diagnostic command for testing the high- and low-side squib drivers. The unlock command ($82 and $83) is an “AND” function with the FEN_1 and FEN_2 BAR. All transistor test unlock commands ($82 and $83) will be echoed back on the SPI Data output. The high- or low-side squib driver FET test will be aborted if firing from any FET is enabled. During the first write (unlock command), all diagnostic functions are cleared. After the second write is completed, all other diagnostic functions are made available again. Squib 1A, squib 1B, squib 2A, and squib 2B high-side squib drivers will be activated and diagnosed by the $82 followed by $1X diagnostic command (refer to Table 8, page 25). A load from the SQB_HI_XX pin to the SENSE_XX pin is required for the high-side squib driver to be tested. Squib 1A, squib 1B, squib 2A, and squib 2B low-side squib drivers will be activated and diagnosed by the $83 followed by $2X diagnostic command (Table 8). When enabled the high- or low-side FET driver will be enabled and current limited to a nominal current limit of 10 mA. The high- and low-side driver test time is not automated and is controlled through SPI. Table 9. RR_LIMIT_X Current Limit RR_LIMIT_X VVFIRE = 7.0 V VVFIRE = 35 V 4.32 k Ω 0.92 A 0.92 A 10 k Ω 1.37 A 1.37 A 45.3 k Ω 2.0 A 2.0 A |
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