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XRT83SL38IB Datasheet(PDF) 75 Page - Exar Corporation |
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XRT83SL38IB Datasheet(HTML) 75 Page - Exar Corporation |
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75 / 88 page ![]() XRT83SL38 73 REV. 1.0.2 OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR TABLE 39: MICROPROCESSOR REGISTER #192, BIT DESCRIPTION REGISTER ADDRESS 11000000 NAME FUNCTION REGISTER TYPE RESET VALUE BIT # D[7:1] Reserved These register bits are not used. R/W 0 D0 E1Arben E1 Arbitrary Pulse Enable This bit is used to enable the Arbitrary Pulse Generators for shaping the transmit pulse shape when E1 mode is selected. If this bit is set to "1", all 8 channels will be configured for the Arbitrary Mode. However, each channel is individually con- trolled by programming the channel registers 0xn8 through 0xnF, where n is the number of the channel. "0" = Disabled (Normal E1 Pulse Shape ITU G.703) "1" = Arbitrary Pulse Enabled R/W 0 |
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