XRT86VL32IB datasheet(45/155 Pages) EXAR

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XRT86VL32

REV. V1.2.0

DUAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION

TABLE 27: GAPPED CLOCK CONTROL REGISTER (GCCR)

HEX ADDRESS: 0Xn11E

BIT

FUNCTION

TYPE

DEFAULT

DESCRIPTION-OPERATION

FrOutclk

R/W

Framer Output Clock Reference

This bit is used to enable or disable high-speed T1 rate on the

T1OSCCLK and the E1OSCCLK output pins.

By default, the output clock reference on T1OSCCLK and

E1OSCCLK output pins are set to 1.544MHz/2.048MHz respectively.

By setting this bit to a “1”, the output clock reference on the

T1OSCLK and the E1OSCCLK are changed to 49.408MHz/

65.536MHz respectively.

0 = Disables high-speed rate to be output on the T1OSCCLK and

E1OSCCLK output pins.

1 = Enables high-speed rate to be output on the T1OSCCLK and

E1OSCCLK output pins.

[6:2] Reserved

Reserved

TxGCCR

R/W

Transmit Gapped Clock Interface

This bit is used to enable or disable the transmit gapped clock inter-

face operating at 2.048Mbit/s in DS-1 mode. In this application, 63

gaps (missing data) are inserted so that the overall bit rate is reduced

to 1.544Mbit/s.

If the transmit Gapped Clock Interface is enabled:

TxMSYNC is used as the 2.048MHz Gapped Clock Input.

TxSER is used as the 2.048MHz Gapped Data Input.

TxSERCLK must be a 1.544MHz clock input.

0 = Disables the transmit gapped clock interface.

1 = Enables the transmit gapped clock interface.

RxGCCR

R/W

Receive Gapped Clock Interface

This bit is used to enable or disable the receive gapped clock inter-

face operating at 2.048Mbit/s in DS-1 mode. In this application, 63

gaps (missing data) are extracted so that the overall bit rate is

reduced to 1.544Mbit/s.

If the Receive Gapped Clock Interface is enabled:

RxSERCLK should be configured as a Gapped clock input at

2.048MHz so that a 2.048MHz Gapped Clock can be applied to the

Framer block.

RxSER is used as the 2.048MHz Gapped Data Output. The position

of the gaps will be determined by the gaps placed on RxSERCLK by

the user.

0 = Disables the Receive Gapped Clock Interface

1 = Enables the Receive Gapped Clock Interface

XRT86VL32IB Datasheet(PDF) 45 Page - Exar Corporation

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