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AD5124 Datasheet(PDF) 28 Page - Analog Devices

Part # AD5124
Description  Single-Channel, 128-/256-Position, I2C/SPI, Nonvolatile Digital Potentiometer
PDF  30 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5124 Datasheet(HTML) 28 Page - Analog Devices

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Data Sheet
AD5121/AD5141
THEORY OF OPERATION
analog.com
Rev. E | 28 of 30
D is the decimal equivalent of the binary code in the 7-bit/8-bit
RDAC register.
RAB is the end-to-end resistance.
RW is the wiper resistance.
In potentiometer mode, similar to the mechanical potentiometer, the
resistance of the RDAC between Terminal W and Terminal A also
produces a digitally controlled complementary resistance, RWA. RWA
also gives a maximum of 8% absolute resistance error. RWA starts
at the maximum resistance value and decreases as the data loaded
into the latch increases. The general equations for this operation
are
AD5121:
RAWD =128−D128×RAB+RW From 0x00 to 0x7F (3)
AD5141:
RAWD =256−D256×RAB+RW From 0x00 to 0xFF (4)
where:
D is the decimal equivalent of the binary code in the 7-bit/8-bit
RDAC register.
RAB is the end-to-end resistance.
RW is the wiper resistance.
If the device is configured in linear gain setting mode, the resist-
ance between Terminal W and Terminal A is directly proportional
to the code loaded in the associate RDAC register. The general
equations for this operation are
AD5121:
RAWD = D128×RAB+RW From 0x00 to 0x7F (5)
AD5141:
RAWD = D256×RAB+RW From 0x00 to 0xFF (6)
where:
D is the decimal equivalent of the binary code in the 7-bit/8-bit
RDAC register.
RAB is the end-to-end resistance.
RW is the wiper resistance.
In the bottom scale condition or top scale condition, a finite total
wiper resistance of 40 Ω is present. Regardless of which setting
the device is operating in, limit the current between Terminal A to
Terminal B, Terminal W to Terminal A, and Terminal W to Terminal
B, to the maximum continuous current of ±6 mA or to the pulse
current specified in Table 7. Otherwise, degradation or possible
destruction of the internal switch contact can occur.
Calculate the Actual End-to-End Resistance
The resistance tolerance is stored in the internal memory during
factory testing. Therefore, the actual end-to-end resistance can be
calculated (which is valuable for calibration, tolerance matching,
and precision applications).
The resistance tolerance (in percentage) is stored in fixed point
format, using a 16-bit sign magnitude binary. The sign bit (0 =
negative and 1 = positive) and the integer part are located in
Address 0x02, as shown in Table 20. Address 0x03 contains the
fractional part, as shown in Table 20.
That is, if the data readback from Address 0x02 is 00000010, and
the data readback from Address 0x03 is 10110000, the end-to-end
resistance can be calculated as follows.
For Memory Map Address 0x02, DB[7] = 0 = negative, and DB[6:0]
= 0000010 = 2.
For Memory Map Address 0x03, DB[7:0] = 10110000 = 176 × 2−8 =
0.6875, and therefore, tolerance = −2.6875%, and RAB = 9.731 kΩ.
PROGRAMMING THE POTENTIOMETER
DIVIDER
Voltage Output Operation
The digital potentiometer easily generates a voltage divider at
wiper-to-B and wiper-to-A that is proportional to the input voltage at
A to B, as shown in Figure 47.
Figure 47. Potentiometer Mode Configuration
Connecting Terminal A to 5 V and Terminal B to ground produces
an output voltage at the Wiper W to Terminal B ranging from 0 V
to 5 V. The general equation defining the output voltage at VW with
respect to ground for any valid input voltage applied to Terminal A
and Terminal B is
VW(D)=RWB(D)RAB×VA+RAW(D)RAB×VB
(7)
where:
RWB(D) can be obtained from Equation 1 and Equation 2.
RAW(D) can be obtained from Equation 3 and Equation 4.
Operation of the digital potentiometer in the divider mode results
in a more accurate operation over temperature. Unlike the rheostat
mode, the output voltage is dependent mainly on the ratio of the
internal resistors, RAW and RWB, and not the absolute values.
Therefore, the temperature drift reduces to 5 ppm/°C.



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