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AD8152 Datasheet(PDF) 1 Page - Analog Devices

Part # AD8152
Description  34 × 34, 3.2 Gbps Asynchronous Digital Crosspoint Switch
PDF  25 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD8152 Datasheet(HTML) 1 Page - Analog Devices

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34 × 34, 3.2 Gbps
Asynchronous Digital Crosspoint Switch
Data Sheet
AD8152
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2002–2019 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
FEATURES
Low cost
Low power: 2.5 V (outputs disabled)
34 × 34, fully differential, nonblocking array
3.2 Gbps per port NRZ data rate
Wide power supply range: 2.5 V to 3.3 V
LVTTL or LVCMOS level control inputs at
2.5 V to 3.3 V
Low channel jitter: 45 ps p-p
Drives a backplane directly
Programmable output swing
100 mV to 1600 mV p-p differential
50 Ω on-chip input/output termination
User controlled voltage at the load
Minimizes power dissipation
Dual rank latches
Available in 256-ball BGA_ED package
APPLICATIONS
Fiber optic network switching
High speed serial backplane routing to OC-48 with FEC
Gigabit ethernet
Digital video (HDTV)
Data storage networks
FUNCTIONAL BLOCK DIAGRAM
OUTPUT
LEVEL
DACs
OUT33N TO
OUT00N
OUT33P TO
OUT00P
VTTO
34
34
MATRIX
CONNECTION
LATCHES
CONNECTION
DECODE
OUTPUT
LEVEL
LATCHES
CONTROL
LOGIC
IN33N TO
IN00N
VTTI
IN33P TO
IN00P
D0 TO D5
A0 TO A6
RE
WE
RESET
CS
UPDATE
VEE
VCC
AD8152
34
34
34 × 34
DIFFERENTIAL
SWITCH MATRIX
Figure 1.
GENERAL DESCRIPTION
The AD8152 is a breakthrough cross point switch offering a
large switch array (34 × 34) on very little power, typically 2.0 W.
Additionally, the device operates at data rates up to 3.2 Gbps per
port, making it suitable for Sonet/SDH OC-48 with forward
error correction (FEC).
The useful supply voltage range of the AD8152 allows the user
to operate at LVPECL/CML data levels down to 2.5 V. The control
interface is low voltage transistor transistor logic (LVTTL) or
low voltage complementary metal-oxide (LVCMOS) compatible on
2.5 V to 3.3 V.
The fully differential signal path of the AD8152 reduces jitter
and crosstalk and allows the use of smaller single-ended voltage
swings. The device is offered in a 256-ball BGA_ED package
that operates over the industrial temperature range of 0°C to
85°C.


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