AD8152 datasheet(21/25 Pages) AD

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Data Sheet

AD8152

Rev. B | Page 21 of 25

Internal Input/Output Termination

The AD8152 includes 50 Ω termination resistors to match

single-ended 50 Ω or 100 Ω transmission lines. All of the input

termination resistors connect to one common point called

VTTI. Similarly, each of the output termination resistors

connects to one common point called VTTO. The voltage can

be set independently at VTTI and VTTO to accommodate

various interface architectures.

Input Coupling

One way to simplify the input circuit and make it compatible

with a wide variety of driving devices is to use ac coupling. This

ac coupling has the effect of isolating the dc common-mode

levels of the driver and the AD8152 input circuitry. For example,

the XAUI interconnect specification for 10 Gbps Ethernet

requires ac coupling to ensure that there are no interactions of

dc levels between the transmitting and receiving devices.

AC coupling requires that the signal patterns have no long-term

dc component, which may occur in any random data stream.

Codes such as 8-bit/10-bit, called for in the XAUI specification, are

used in many data communications systems to ensure that the data

pattern maintains a common-mode balance. This is accomplished

by run length limiting (RLL), which sets a maximum limit for

the number of 1s or 0s that can occur consecutively. In addition,

residual dc components are monitored and modified by keeping

track of the running disparity, excess of 1s vs. 0s, or vice versa.

For the AD8152 inputs, ac coupling requires a capacitor in

series with each single-ended input signal, as shown in Figure 35.

AC coupling is recommended to be done in a manner that does

not interfere with the high speed signal integrity of the PCB

board. The two critical variables are setting the proper voltage

for VTTI and selecting the correct value of coupling capacitors.

VTTI

VCC

50Ω

VEE

INxxP

INxxN

CINP

CINN

Figure 35. AC Coupling Input Signal from AD8152

On the AD8152 side of the input coupling capacitor, the average

value of the single-ended input voltage is at the voltage set at

VTTI. The range of allowable voltages is a function of the

acceptable input voltages of the active circuitry of the AD8152

inputs and the amplitude of the input signal. The operating

input range of the AD8152 extends from VCC + 0.2 V to 0.8 V

above VEE.

The total range that is occupied by the input signal is the

average value (as established by the voltage applied to VTTI)

plus or minus one half the single-ended swing of the signal. For

a standard 800 mV p-p differential signal, the single-ended swing is

400 mV p-p. Thus, the signal swings ±200 mV around the

average value equal to VTTI.

If VTTI is set equal to VCC, the single-ended signal meets the

specifications where the highest input voltage level does not

exceed the design compliance threshold of VCC + 0.2 V. The

lowest signal-ended input voltage level must be greater than

0.8 V above VEE to maintain compliance with the design

specification.

With ac-coupled inputs, there is no power consumption

advantage associated with varying VTTI. As a practical matter,

it may be desirable to set VTTI at the same voltage as VTTO so

that only one supply is necessary.

Output Coupling

Each single-ended output of the AD8152 has a 50 Ω termination

resistor that ties to VTTO. The differential termination tied to

VTTO is 25 Ω. When VTTO is varied, it changes the common-

mode levels of the outputs and the power dissipation of the output

stages when enabled.

The individual output currents are programmable. Varying this

output current changes the lower level of the output voltage (and

thus the peak-to-peak swing) and changes the power dissi-

pation in the output stages. To obtain a standard 800 mV p-p

differential output (single-ended = 400 mV p-p), it is recom-

mended to program the output current to 16 mA.

If the AD8152 drives another device that is ac-coupled, there is

no interaction of the dc levels on each side of the coupling

capacitors (see Figure 36). The dc levels for the AD8152 can be

calculated independently of the levels of the driven device. The

upper allowable setting for VTTO is 0.2 V higher than VCC.

To save power, VTTO can be lowered. The lowest level for

VTTO is determined by the lowest output level allowable (VOL) by

the AD8152 output when the output signal is logically low. It is

recommended that the output does not go lower than 1.0 V

below VCC. If the single-ended swing of an output is 400 mV p-p,

the lowest that VTTO can go is 0.6 V below VCC. For more

information on VOL, see Figure 25.

VTTO

VEE

50Ω

OUTxxP

OUTxxN

AD8152

VEE

VCC

VTT

VCC

DRIVEN DEVICE

VEE

I = 2mA × (CODE) + 2mA

Figure 36. AC Coupling Output Signal from AD8152

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