LTC2672 datasheet(24/27 Pages) AD

24 / 27 page

Data Sheet

LTC2672

THEORY OF OPERATION

analog.com

Rev. B | 24 of 27

the die cools. Lower than approximately 150°C, the DAC channels

can be returned to normal operation. Note that a CS/LD rising edge

releases the FAULT pin regardless of the die temperature.

Because any DAC channel can source up to 300 mA, the die

heating potential of the system design must be evaluated carefully.

Finally, FR7 is provided to flag invalid SPI word lengths. Valid word

lengths are 24 bits, 32 bits, and integer multiples of 32 bits. Any

other length causes FR7 to set, the FAULT pin to assert, and the

instruction itself to be ignored.

Note that FR6 is unused in this device.

CONFIGURATION COMMAND

The configuration command has three arguments: OC, TS, and RD

(see Figure 34).

Setting the OC bit disables open-circuit detection (FR0 to FR4),

while the TS bit disables thermal protection (FR5). Set TS with

caution because thermal damage can easily occur and is the

responsibility of the user.

The RD bit is used to select external reference operation. The

REFCOMP pin must be grounded for external reference use.

POWER-DOWN MODE

For power constrained applications, power-down mode can be

used to reduce the supply current whenever less than five DAC

outputs are needed. When in power-down, the voltage-to-current

output drivers and reference buffers are disabled. The current DAC

outputs are set to off mode. Register contents are not disturbed

during power-down.

Any channel or combination of channels can be put into power-

down mode by using Command 0100b in combination with the

appropriate DAC address. In addition, all DAC channels and the

integrated reference together can be put into power-down using the

power-down chip command, 0101b. The 16-bit data word is ignored

for all power-down commands.

Active operation resumes by executing any command that includes

a DAC update, either in software, as shown in Table 8, or by

toggling (see the Toggle Operations section). The selected DAC

channel is powered up as it is updated with the new code value.

When updating a powered-down DAC, add wait time to accommo-

date for the extra power-up delay. If the channels are powered

down (Command 0100b) before the update command, the power-

up delay time is 30 µs. If, alternatively, the chip is powered down

(Command 0101b), the power-up delay time is 35 µs.

SAFE SUPPLY RANGES

The five output supplies (VDD0 to VDD4) can be independently set

between 2.1 V (2.4 V for the 300 mA range) and VCC. In addition,

the negative supply, V−, can be set to any voltage between −5.5 V

and GND. However, keep the total output supply voltage (VDDx with

respect to V−) in the 2.85 V to 9.0 V range, as specified in Table 1

and shown in Figure 32.

A minimum of 2.85 V is needed to establish drive for the output P-

type metal-oxide semiconductor (PMOS), while the 9.0 V maximum

provides a margin of voltage stress tolerance for the output circuit.

Dropout performance is sensitive to the total output supply voltage.

VDROPOUT falls to its minimum as (VDDx − V−) rises from 2.85 V to

4.75 V, and then stays essentially constant as the voltage further

increases to 9.0 V. See the VDROPOUT specifications in Table 1 and

Figure 17.

VCC must be in the 2.85 V ≤ VCC ≤ 5.5 V range and be greater than

or equal to the VDD0 to VDD4 output supplies.

–6

–5

–4

–3

–2

–1

V–

9.0V MAXIMUM

2.85V MINIMUM

VCC

VDD0/VDD1/VDD2/VDD3/VDD4

SAFE-OPERATING AREA

Figure 32. Output Supply Safe Operating Area

CURRENT OUTPUTS

The LTC2672 incorporates a high gain voltage to current converter

at each current output pin. INL and DNL are guaranteed for all

ranges from 3.125 mA to 300 mA if the minimum dropout voltage

(VDDx − VOUTx) is met for all DAC codes.

If sufficient dropout voltage is maintained, the dc output impedan-

ces of the current outputs (OUT0 to OUT4) are high. Each current

output has a dedicated positive supply pin, VDD0 to VDD4, to allow

the tailoring of the current compliance and power dissipation of

each channel.

OUTx

V–

VDDx

OFF

RON < 12Ω

80mA

Figure 33. Switch to V– Mode

LTC2672 Datasheet(PDF) 24 Page - Analog Devices

LTC2672 Datasheet(HTML) 24 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27

Datasheet Download

Link URL