LTC2686 datasheet(34/45 Pages) AD

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Data Sheet

LTC2686

THEORY OF OPERATION

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Rev. A | 34 of 45

Write A/B Select Register

The command shown in Table 30 writes the A/B select register,

AB[7:0], controlling access to DAC Input Register A and DAC Input

Each of the 8 bits in AB[7:0] controls write access to the A or B

Channel x to write to Input Register A, and set ABx to 1 to write to

Input Register B. The default value is 0x0000.

For example, AB7 = 0 gives write access to the A Input Register

of Channel 7, whereas AB7 = 1 gives write access to the B Input

Write Software Toggle Bit Register

The command shown in Table 31 writes the software toggle bit

controlled toggle pin for the respective DAC channel. Note that the

transition of a toggle bit is defined by the CS/LD rising edge at the

end of the command frame. The default value is 0x0000.

Write Toggle/Dither Enable Register

The command shown in Table 33 writes the toggle/dither enable

for the DAC Channel x. Set ENx = 0 to disable toggle or dither

functionality. The default value is 0x0000. The toggle/dither enable

operation.

In toggle mode, disabling toggle connects the DAC channel to Input

DAC channel to finish the sine wave cycle before connecting to

Input Register A. This procedure requires the user to apply enough

dither clock cycles to complete the sine wave cycle after toggle

functionality is stopped.

Table 33. Write Toggle/Dither Enable Register, Command 11

Command

Code

Byte 1

Byte 2

Byte 3

0111 0100

EN7

EN6

EN5

EN4 X

EN3 X

EN2 X

EN1 X

EN0 X X C/X C/X C/X C/X C/X C/X

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