Electronic Components Datasheet Search
  English  ▼

X  

LTC2686 Datasheet(PDF) 7 Page - Analog Devices

Part # LTC2686
Description  8-Channel, 12-/16-Bit Voltage Output SoftSpan DAC
PDF  45 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC2686 Datasheet(HTML) 7 Page - Analog Devices

Back Button LTC2686 Datasheet HTML 3Page - Analog Devices LTC2686 Datasheet HTML 4Page - Analog Devices LTC2686 Datasheet HTML 5Page - Analog Devices LTC2686 Datasheet HTML 6Page - Analog Devices LTC2686 Datasheet HTML 7Page - Analog Devices LTC2686 Datasheet HTML 8Page - Analog Devices LTC2686 Datasheet HTML 9Page - Analog Devices LTC2686 Datasheet HTML 10Page - Analog Devices LTC2686 Datasheet HTML 11Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 45 page
background image
Data Sheet
LTC2686
SPECIFICATIONS
analog.com
Rev. A | 7 of 45
TIMING CHARACTERISTICS
All specifications apply over the full operating temperature range, unless otherwise noted. Typical values are at TA = 25°C. VCC = 4.75 V to 5.25
V, IOVCC = 1.71 V to VCC. CLOAD is load capacitance. IOVCC = 2.7 V to VCC, unless otherwise noted. See Figure 2.
Table 2.
Parameter
Description
Min
Typ
Max
Unit
t1
SDI valid to SCK setup
3
ns
t2
SDI valid to SCK hold
3
ns
t3
SCK high time
6
ns
t4
SCK low time
6
ns
t5
CS/LD pulse width
8
ns
t6
LSB SCK high to CS/LD high
5
ns
t7
CS/LD low to SCK high
5
ns
t8
SDO propagation delay from SCK falling edge, CLOAD = 10 pF, IOVCC = 2.7 V to 5.25 V
25
ns
SDO propagation delay from SCK falling edge, CLOAD = 10 pF, IOVCC = 1.7 1 V to 2.7 V
60
ns
t9
CLR pulse width
8
ns
t10
CS/LD high to SCK positive edge
4
ns
t11
LDAC pulse width
8
ns
t12
CS/LD high to LDAC high or low transition1
8
ns
fSCK
SCK frequency
50
MHz
t13
TGPx high time
0.25
μs
t14
TGPx low time2
0.25
μs
1 Value of t12 is not valid for write code to all DAC channels. For write code to all DAC channels, the typical value of t12 is 320 ns.
2 Guaranteed by design but not production tested.
Timing Diagram
Figure 2. Serial Interface Timing Diagram



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com