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LTC2686 Datasheet(PDF) 24 Page - Analog Devices |
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LTC2686 Datasheet(HTML) 24 Page - Analog Devices |
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24 / 45 page ![]() Data Sheet LTC2686 THEORY OF OPERATION analog.com Rev. A | 24 of 45 SPAN SELECTION AND CHANNEL SETTINGS Figure 51. DAC Transfer Functions for LTC2686-16, All Voltage Spans and Bit Resolutions, Internal Reference Mode Figure 52. DAC Transfer Functions for LTC2686-12, All Voltage Spans and Bit Resolutions, Internal Reference Mode The LTC2686 allows individual programming of the voltage span (output voltage range) for each DAC channel (SoftSpan). The device also supports 5% overrange spans. The span selection bits, S[3:0], encode span settings as summarized in Table 14 and Table 15, and the corresponding DAC transfer functions are depicted in Figure 51. Table 14. Span Selection Bits S[3:0] Settings S3 S2 S1 S0 Output Range Internal Reference External Reference 0 0 0 0 0 V to 5 V 0 V to 5 × (VREF/4.096) 0 0 0 1 0 V to 10 V 0 V to 10 × (VREF/4.096) 0 0 1 0 ±5 V ±5 × (VREF/4.096) 0 0 1 1 ±10 V ±10 × (VREF/4.096) 0 1 0 0 ±15 V ±15 × (VREF/4.096) Table 15. Span Selection Bits S[3:0] Settings, 5% Overrange S3 S2 S1 S0 Output Range Internal Reference External Reference 1 0 0 0 0 V to 5.25 V 0 V to 5 × (VREF/4.096) 1 0 0 1 0 V to 10.5 V 0 V to 10 × (VREF/4.096) 1 0 1 0 ±5.25 V ±5 × (VREF/4.096) 1 0 1 1 ±10.5 V ±10 × (VREF/4.096) 1 1 0 0 ±15.75 V ±15 × (VREF/4.096) Use Command 1, detailed in Table 13, to program DAC channel settings and span ranges. Span settings are contained in Bits S[3:0] and the default value is 0x0. Note that X represents the don’t care bits and C represents the CRC code bits. If CRC error checking is not used, the third data byte can be omitted (24-bit word length). See the Toggle and Dither Operation section for a detailed descrip- tion of related registers and functions. Command 1 writes the settings of DAC Channel x, with DAC Channel Address x encoded in A[3:0]. Command 16 writes settings to all DAC channels, whereas Command 17 also updates all DAC channels. READ COMMANDS Read operations are initiated with read commands as shown in Table 16. The command byte is followed by X (don’t care bits), and an optional CRC code. For example, when reading the config- uration register, the user must send Command 24 (see Table 16) to the device. The requested data appears at the SDO pin in the next command cycle (see Table 17) and mirrors the syntax of the corresponding write command. Note that the device outputs trailing zeros for the third byte. For a list of supported read commands, refer to Table 9. Table 16. Command Word for Reading Configuration Register, Command 24 Command Code Byte 1 Byte 2 Byte 3 1111 0000 X X X X X X X X X X X X X X X X X X C/X C/X C/X C/X C/X C/X Table 17. SDO Pin Data-Words After the Read Configuration Register Command Command Code Byte 1 Byte 2 Byte 3 1111 0000 RST 0 0 0 0 0 0 0 0 0 0 0 0 TSD_ DIS EXT_ REF SPI_ CRC 0 0 0 0 0 0 0 0 |
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