LLCC68 datasheet(26/106 Pages) SEMTECH

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LLCC68

Data Sheet

Rev. 1.0

DS.LLCC68.W.APP

July 2019

26 of 106

Semtech

www.semtech.com

Table 4-3: Intermediate Frequencies in LoRa® Mode

4.4 Transmitter

The transmit chain uses the modulated output from the modem bank which directly modulates the fractional-N PLL. An

optional pre-filtering of the bit stream can be enabled to reduce the power in the adjacent channels, also dependent on

the selected modulation type.

The default maximum RF output power of the transmitter is +22 dBm. The RF output power is programmable with 32 dB of

dynamic range, in 1 dB steps. The power amplifier ramping time is also programmable to meet regulatory requirements.

The power amplifier is supplied by the regulator VR_PA and the connection between VR_PA and RFO is done externally to

the chip. VR_PA, supplied through VDD_IN, is taken directly from the battery and in this case maximum output power is

limited by supply voltage at VDD_IN.

4.4.1 Power Amplifier Specifics

Caution!

All figures below are indicative and typical, and are not a specification. These figures only highlight behavior of the

PA over voltage and current.

Figures are given with DC-DC regulation enabled, which applies only to the circuit core.

The PA is optimized for maximum output power whilst maximizing the efficiency, which makes it mandatory to supply the

power amplifier with fairly high voltages to maintain an high output power. To summarize:

•

the current efficiency of the PA is optimal at the highest output power step

•

output power will be limited by the voltage supplied to VBAT

BW Setting

Bandwidth [kHz DSB]

Intermediate Frequency [kHz]

LORA_BW_500

500

LORA_BW_250

250

LORA_BW_125

125

250

LLCC68 Datasheet(PDF) 26 Page - Semtech Corporation